• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.186-190
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• 2000

This paper propose a "Active common-mode voltage damper circuit" that capable of a suppression of a common-mode voltage produced in the PWM VSI. The four level half-bridge PWM inverter circuit and common-mode transformer are incorporated into the "Active common-mode voltage damper" the design method of which is presented Effect of "Active common-mode voltage damper" in this paper verifies a propriety and effectiveness in 2.2[kW] induction motor drive using IGBT inverter. Experimental results show that "common-mode voltage damper" makes contributions to reducing a high frequency leakage current and common-mode voltage.leakage current and common-mode voltage.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 전력전자학술대회 논문집
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• pp.151-154
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• 2001

This paper propose a new active common-mode voltage damper circuit that is capable of suppressing a common-mode voltage produced in the PWM VSI. The new active common mode voltage damper is consisted of a half-bridge inverter and a common mode transformer with a blocking capacitor. Principle of the active common mode damper is as follow; by applying the compensation voltage which has the same amplitude and opposite polarity to the PWM inverter system. So, common mode voltage and high frequency leakage current can be reduced. Simulated and experimental results show that common-mode voltage damper makes contributions to reducing a high frequency leakage current and common-mode voltage.

• Journal of Power Electronics
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• 제15권3호
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• pp.712-720
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• 2015

A model predictive current control (MPCC) method that does not employ a cost function is proposed. The MPCC method can decrease common-mode voltages in loads fed by three-phase voltage-source inverters. Only non-zero-voltage vectors are considered as finite control elements to regulate load currents and decrease common-mode voltages. Furthermore, the three-phase future reference voltage vector is calculated on the basis of an inverse dynamics model, and the location of the one-step future voltage vector is determined at every sampling period. Given this location, a non-zero optimal future voltage vector is directly determined without repeatedly calculating the cost values obtained by each voltage vector through a cost function. Without utilizing the zero-voltage vectors, the proposed MPCC method can restrict the common-mode voltage within ± V_dc/6, whereas the common-mode voltages of the conventional MPCC method vary within ± V_dc/2. The performance of the proposed method with the reduced common-mode voltage and no cost function is evaluated in terms of the total harmonic distortions and current errors of the load currents. Simulation and experimental results are presented to verify the effectiveness of the proposed method operated without a cost function, which can reduce the common-mode voltage.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.373-376
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• 1999

This paper propose a "common mode voltage damper" that is capable of reducing the common mode voltage produced in the PWM VSI. An push-pull circuits and high frequency leakage current damper[1] are incorporated into the "common mode voltage damper", the design method of which is presented. Effect of "common mode voltage damper" is simulated in this paper verifies the viability and effectiveness in 2.2kW induction motor drive using IGBT inverter. Simulated results show that "common mode voltage damper" makes significant contributions to reducing a high frequency leakage current.ducing a high frequency leakage current.

• 전력전자학회논문지
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• 제6권5호
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• pp.423-431
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• 2001

최근의 유도전동기 구동 시스템은 고속의 ON, OFF동작 특성을 가진 전력 반도체 소자를 가진 인버터와 이를 제어하기 위한 SVPWM(Space Vector PWM)제어이론에 의하여 주로 구성되어 있다. 이러한 PWM 인버터는 정현파 형태의 전압과 전류를 얻기 위해 높은 스위칭 주파수로 동작을 하게 되고, 매 스위칭이 일어나는 순간마다 di/dt 및 dv/dt가 매우 크기 때문에 무시할 수 없는 양의 고주파 누설전류가 고정자 권선과 프레임 사이에 존재하는 기생 커패시터를 통해 접지로 흐르게 된다. 이로 인해 누전보호 계전기의 오동작 및 모터 권선의 절연파괴에 의한 모터의 수명단축 등과 같은 문제점을 야기하게 된다. 본 논문에서는 이러한 문제점을 일으키는 고주파 누설 전류와 커먼 모드 전압을 감쇄하기 위하여 4 레벨 반파 브릿지 인버터에 의해 커먼 모드 전압과 크기가 같고 극성이 반대인 전압을 생성하고, 이 전압을 커먼 모드 트랜스포머에 인가하여 누설 전류의 원인이 되는 커먼 모드 전압을 상쇄시킬 수 있는 새로운 형태의 능동형 커먼 모드 전압 감쇄기를 제안하였다. 제안된 감쇄기의 동작 성능을 P-SPICE를 이용한 시뮬레이션 및 실험을 통하여 검증하였다.

• Journal of Power Electronics
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• 제19권1호
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• pp.201-210
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• 2019

This paper proposes a multimode hybrid control strategy that can achieve zero-voltage switching of primary switches and zero-current switching of secondary rectifier diodes in a wide input voltage range for full-bridge LLC resonant converters. When the input voltage is lower than the rated voltage, the converter operates in Mode 1 through the variable-frequency control strategy. When the input voltage is higher than the rated voltage, the converter operates in Mode 2 through the VF and phase-shift control strategy until the switching frequency reaches the upper limit. Then, the converter operates in Mode 3 through the constant-frequency and phase-shift control strategy. The secondary-side diode current will operate in the discontinuous current mode in Modes 1 and 3, whereas it will operate in the boundary current mode in Mode 2. The current RMS value and conduction loss can be reduced in Mode 2. A detailed theoretical analysis of the operation principle, the voltage gain characteristics, and the realization method is presented in this paper. Finally, a 500 W prototype with 100-200 V input voltage and 40 V output voltage is built to verify the feasibility of the multimode hybrid control strategy.

• JSTS:Journal of Semiconductor Technology and Science
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• 제9권2호
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• pp.104-109
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• 2009

At a lower supply voltage, voltage-mode drivers draw less current than current-mode drivers. In this paper, we newly propose a voltage-mode driver with an additional current path that reduces the output voltage swing without the need for complicated additional circuitry, compared to conventional voltage-mode drivers. The prototype driver is fabriccated in a 0.13-$^{\mu}m$ CMOS technology and used to transmit data streams at the rate of 2.5 Gb/s. Deemphasis is also implemented for the compensation of channel attenuation. With a 1.2-V supply, it dissipates 8.0 mA for a 400-mV output voltage swing.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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• pp.171-175
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• 1998

This paper proposes the advanced PWM method that can reduce common-mode voltage in three-phase PWM converter-inverter system. By the proper distribution of the zero-voltage vector of inverter, it is possible to cancel out a common-mode voltage pulse in a sampling period. Since the proposed PWM method maintains the effective-voltage vector, it does not affect the control performance of converter-inverter system. Without any extra hardware, overall common-mode voltage can be decreased by one-third compared with conventional PWM scheme.

• 대한전자공학회논문지SD
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• 제45권6호
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• pp.1-9
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• 2008

본 논문에서는 temperature/voltage에 둔감한 triple-mode CMOS DC-DC Converter를 제안한다. 제안된 triple-mode DC-DC converter는 단일 배터리의 수명에 따른 전압변화(3.3-5.5V)로부터 일정 또는 다양한 출력전압(0.6-2.2V)을 생성한다. 제안된 triple-mode CMOS DC-DC converter는 Pulse Width Modulator(PWM) 모드, Pulse Frequency Modulator(PPM) 모드, 그리고 Low Drop-Out(LDO) 모드, 이렇게 세 가지 모드로 동작한다. 또한, 제안된 회로는 temperature/voltage 변화에 의한 칩의 오동작을 방지하기 위해 temperature/voltage 변화에 둔감한 저 전력 1MHz CMOS ring oscillator를 사용한다. 제안된 triple-mode DC-DC converter는 단일 입력 전원소스(3.3-5.5V)에서 출력 전압(0.6-2.2V)을 생성하며, 출력 전압 ripple은 PWM mode에서 10mv, PFM mode에서 15mV, 그리고 LDO mode에서는 4mV 이하이다. 또한, 제안된 회로의 효율은 PWM mode에서 93% 이상이며, $-25-80^{\circ}C$의 온도변화에도 각 모드에서의 출력 전압 레벨의 오차는 단지 0.8% 이하로 유지한다 제안된 회로의 검증을 위해 CMOS $0.35{\mu}m$ 공정을 이용한 시뮬레이션 및 칩 테스트를 수행하였다.

• Journal of Power Electronics
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• 제19권6호
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• pp.1582-1590
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• 2019

A new method for reducing the common-mode current generated by the voltage variations in a two-inverter air conditioner system by applying a synchronized pulse-width modulation (PWM) strategy is proposed. The PWM signals of the master-mode inverter are generated based on the reference voltage, while those of the slave-mode inverter are output in the opposite direction when the master-mode inverter changes its switching state. However, the slave-mode control results in a mismatch between the reference voltage and the actual output voltage that is modified by synchronized control operation. The proposed method is capable of reducing and controlling this voltage error by performing signal selection in the vector space of the slave-mode inverter, which mitigates the distortion of the phase current. The efficacy of this method in reducing conducted emissions has been validated both theoretically and experimentally.