• ETRI Journal
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• v.24 no.5
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• pp.333-340
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• 2002

We propose a new process technique for fabricating very high-density trench MOSFETs using 3 mask layers with oxide spacers and a self-aligned technique. This technique reduces the device size in trench width, source, and p-body region with a resulting increase in cell density and current driving capability as well as cost-effective production capability. We were able to obtain a higher breakdown voltage with uniform oxide grown along the trench surface. The channel density of the trench DMOSFET with a cell pitch of 2.3-2.4 ${\mu}m$ was 100 Mcell/$in^2$ and a specific on-resistance of 0.41 $m{\Omega}{\cdot}cm^2$ was obtained under a blocking voltage of 43 V.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.27 no.8
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• pp.1259-1265
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• 2003

We present a new post-fabrication frequency tuning method for laterally driven electrostatic microresonators using a DC-biased electrostatic comb array of linearly varied finger-length. The electrostatic tuning force and the equivalent stiffness, adjusted by the DC-biased tuning-comb array, have been formulated as functions of geometry and DC tuning voltage. A set of frequency-turnable microresonators has been designed and fabricated by 4-mask surface-micromachining process. The resonant frequency of the microfabricated microresonator has been measured for a varying tuning voltage at the reduced pressure of 1 torr. The maximum 3.3% reduction of the resonant frequency is achieved at the tuning voltage increase of 20V.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.195-198
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• 2003

본 연구에서는 MILC 및 FALC를 도핑 타입에 따른 온도별 패턴별 인가 전압별로 진행하여 현미경 및 FESEM 관찰을 함으로써 그 메커니즘을 규명하고자 하였다. LPCVD를 이용하여 $1000\;{\AA}$ a-Si 을 glass에 입힌 후 photolithography법 또는 Hard Mask법으로 Ni $200\;{\AA}$ 을 선택적으로 증착하였으며 Pt 전극을 Sputtering법으로 제작하였다. $33\;{\sim}\;200\;V/cm$의 전기장 하에서 MILC 속도가 2배 정도 증가되는 현상이 관찰되었으며 또한 인접패턴에 의해 FALC 속도가 영향을 받는 현상이 관찰되었다. 또한 전자가 움직이는 방향으로 MILC 선단영역 전후에 Void가 발생하는 영역이 존재함을 발견하였다. FESEM 분석을 통하여 FALC 영역 및 Void 영역을 관찰한 결과 도핑 종류에 따라 결정화 양상이 다른 것이 관찰되었으며 Void 분석결과 Charged vacancy가 어닐링시 결집되어 나타나는 것으로 분석할 수 있었다.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.50 no.7
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• pp.346-350
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• 2001

We present a surface-micromachined polysilicon capacitive accelerometer using unevenly distributed comb electrodes. The unique features of the accelerometer include a perforated proof-mass and the inner and outer comb electrodes with uneven electrode gaps. The perforated proof-mass reduces stiction between the structure and the substrate and the unevenly distributed electrodes shorten the electrode length required for a given sensitivity. The polysilicon accelerometer has been fabricated by the conventional 6-mask surface-micromachining process and showes a sensitivity of 1.03mV/g with a hybrid detection circuitry.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.10
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• pp.853-858
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• 2003

In this study, a new simplified technology for fabricating high density trench gate DMOSFETs using only three mask layers and TEOS/nitride spacer is proposed. Due to the reduced masking steps and self-aligned process, this technique can afford to fabricate DMOSFETs with high cell density up to 100 Mcell/inch$^2$ and cost-effective production. The resulting unit cell pitch was 2.3∼2.4${\mu}$m. The fabricated device exhibited a excellent specific on-resistance characteristic of 0.36m$\Omega$. cm$^2$ with a breakdown voltage of 42V. Moreover, time to breakdown of gate oxide was remarkably increased by the hydrogen annealing after trench etching.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.297-300
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• 2005

The characteristics of polycrystalline silicon thin-film transistors (poly-Si TFTs) fabricated using sputter deposited amorphous silicon (a-Si) precursor films are investigated. The a-Si films were deposited on flexible polymer substrates using argon-helium mixture gases to minimize the argon incorporation into the film. The precursor films were then laser annealed by using a XeCl excimer laser and a four-mask-processed poly-Si TFT was fabricated with fully self-aligned top gate structure. The fabricated pMOS TFT showed field-effect mobility of $32.4cm^2/V{\cdot}s$ and on/off ratio of $10^6$.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.1
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• pp.47-52
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• 2004

3D microstructures with different side-wall angles and different scales are fabricated by both methods of inclined exposure and rear-side exposure at each of selected areas on a same substrate. Conventional methods of inclined exposure are used to make side-walls with a same inclined angle on one substrate and to get a scale error due to front-side exposure through thick photoresist layer, But, by using the proposed method, we are able to fabricate 3D microstructures on a same substrate with various side-wall angles and accurate dimensions as the original design. In the rear-side exposure, UV exposure light reflects from the chromium mask pattern after passing through the thick photoresist layer, resulting in fabrication of well-defined, inclined 3D structures inside the thick photoresist layer.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.12 no.8
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• pp.639-647
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• 2002

The nonlinear vibration of the thin perforated plate is analyzed in consideration of the V-shaped tension distribution and the effect of wire impact damping. The reduced order FEM model of the tension plate is obtained from dynamic condensation for the mass and stiffness matrices. Tension wire is modeled using the lumped parameter method to effectively describe its contact interactions with the plate. The nonlinear contact-impact model is composed of spring and damper elements, of which parameters are determined from the Hertzian contact theory and the restitution coefficient, respectively. From the evaluation of the computational accuracy and computation time for the deduced impact stiffness and damping coefficient, we determined proper values for the simulation works, accounting for the computational accuracy as well as the computational efficiency. Finally we discussed the results of nonlinear nitration analysis for variations of their design parameters.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.6
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• pp.742-750
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• 2018

In this paper, in order to enable zero-layer FTP cell using only 5V MOS devices on the basis of $0.13{\mu}m$ BCD process, the tunnel oxide thickness is used as the gate oxide thickness of $125{\AA}$ of the 5V MOS device at 82A. The HDNW layer, which is the default in the BCD process, is used. Thus, the proposed zero layer FTP cell does not require the addition of tunnel oxide and DNW mask. Also, from the viewpoint of memory IP design, a single memory structure which is used only for trimming analog circuit of PMIC chip is used instead of the dual memory structure dividing into designer memory area and user memory area. The start-up circuit of the BGR (Bandgap Reference Voltage) generator circuit is designed to operate in the voltage range of 1.8V to 5.5V. On the other hand, when the 64-bit FTP memory IP is powered on, the internal read signal is designed to maintain the initial read data at 00H. The layout size of the 64-bit FTP IP designed using the $0.13-{\mu}m$ Magnachip process .is $485.21{\mu}m{\times}440.665{\mu}m$($=0.214mm^2$).

• Journal of the Korean Society of Clothing and Textiles
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• v.14 no.3 s.35
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• pp.183-195
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• 1990

The author has studied the effect of clothes design to mask the dorsal curvature that is one of the commonest changes in elderly women. Body measurements including the body type and the status of dorsal curvature were perfor-med on 153 women of over 60 years of age, and then a body form to fit to the mean measure-ments was made to evaluate the effects of various designs to it. With 31 pattern designs modified by changing in their slash lines and gathers using darts, the diminishing effect of the rounded back were evaluated by means of sensory test. The results of this study can be summarized as follows: I . Results from the body measurements 1) The mean body type in elderly women was that of obesity. 2) With the advancement of age, the angle to indicate the degree of dorsal curvature as well as the angle to indicate the posture are increased. II . Concerning to the clothes design to diminish the shape of dorsal curvature 1) Among the designs by the position of darts, the basic pattern (Fig. 5-1-(1)) showed the best effect to mask the shape of dorsal curvature. 2) Out of the applied designs of princess lines, that in which the slash line is pointing toward the shoulder point (Fig. 5-2-(1)) seemed to be most effective. 3) What has angled princess line (Fig. 5-3-(1)) had the most diminishing effect among the waist darts and armhole princess lines. 4) Among the V-shaped designs, the slashed at the shoulder point (Fig. 5-4-(1)) had the best effect to lessen the shape of the dorsal cuuature. 5) Wider angle yoke had better effect to the narrow angle one among the designs with straight yoke, and that with downward direction (Fig. 5-5-(1)) showed the best effect. 6) Between straight wide angle yoke and curved yoke, that of curved one with downward direction (Fig. 5-6-(1)) had better effect as far as the masking effect of dorsal curvature is concerned. 7) Gathers around the neck showed better effect to those around the shoulder, and the more amount of gathers (Fig. 5-7-(1)), there was better effect. 8) The design with midline gathers at the level of horizontal slash line of armhole (Fig. 5-8-(1)) showed better effect to that with seperated gathers. 9) In case of design with gathers at the horizontal line of armhole, it showed the better effect with less amount of gathers in midline ones, but with more amount in the side ones. 10) Considering all 7 different designs with better effect in covering the shape of dorsal curvature, it was evident that the design with gathers was far better than the design with application of slash lines.