• 제목/요약/키워드: Tunneling effect

검색결과 320건 처리시간 0.021초

Dependency of Tunneling Field-Effect Transistor(TFET) Characteristics on Operation Regions

  • Lee, Min-Jin;Choi, Woo-Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제11권4호
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    • pp.287-294
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    • 2011
  • In this paper, two competing mechanisms determining drain current of tunneling field-effect transistors (TFETs) have been investigated such as band-to-band tunneling and drift. Based on the results, the characteristics of TFETs have been discussed in the tunneling-dominant and drift-dominant region.

포켓 구조 터널링 전계효과 트랜지스터의 2D 터널링 효과 (2D Tunneling Effect of Pocket Tunnel Field Effect Transistor)

  • 안태준;유윤섭
    • 한국정보통신학회:학술대회논문집
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    • 한국정보통신학회 2017년도 추계학술대회
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    • pp.243-244
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    • 2017
  • 이 논문은 터널링 전계효과 트랜지스터의 밴드 간 터널링 전류 계산에 대하여 1차원과 2차원 방향의 터널링이 어떤 차이를 나타내는지 알아보았다. 2차원 방향의 터널링은 1차원 방향의 터널링에서 계산 되지 않는 대각선 방향의 터널링이 나타나기 때문에 더 정확한 터널링 전류를 계산할 수 있다. 시뮬레이션 결과는 문턱전압 이상의 전압에서는 2차원 방향으로 일어나는 터널링이 큰 영향을 미치지 않지만, 문턱전압 이하에서는 문턱전압 이하 기울기에 많은 영향을 미친다.

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Polyimide LB막내의 탄성 및 비탄성 tunneling 전기전도특성 (Elastic and inelastic electron tunneling characteristics in polyimide LB films)

  • 김태성;김현종
    • E2M - 전기 전자와 첨단 소재
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    • 제7권6호
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    • pp.473-480
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    • 1994
  • The electron tunnel effect in polvimide LB films sandwiched between metal electrodes has been investigated in the present work by a study of both the elastic and inelastic tunneling components. By the results of elastic tunneling experiments in Au/Pl/Au tunneling junction, we can judge the height and thickness of tunnel barrier. The inelastic current in Inelastic Electron Tunneling Spectroscopy(IETS) is due to the interaction of the tunneling electron with the vibrational modes of the molecular species in the barrier. Measurements are done on Au/PI/Pb tunneling junctions. The spectra obtained are the second derivatives of the current-voltage characteristics of these junctions : specifically, d$^{2}$1/dV$^{2}$ as a function of voltage V. Because the energies measured by IETS can be directly compared to those measured by infrared and Raman spectroscopy, IR-RAS spectroscopy also measured for reference.

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소스영역으로 오버랩된 게이트 길이 변화에 따른 터널 트랜지스터의 터널링 전류에 대한 연구 (Source-Overlapped Gate Length Effects at Tunneling current of Tunnel Field-Effect Transistor)

  • 이주찬;안태준;심언성;유윤섭
    • 한국정보통신학회:학술대회논문집
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    • 한국정보통신학회 2016년도 추계학술대회
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    • pp.611-613
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    • 2016
  • TCAD 시뮬레이션을 이용하여 소스영역으로 오버랩된(overlapped) 게이트를 가진 터널링 전계효과 트랜지스터(Tunnel Field-Effect Transistor; TFET)의 오버랩된 게이트 길이에 따른 터널링 전류 특성을 조사하였다. 터널링은 크게 라인터널링과 포인트 터널링으로 구분되는데, 라인터널링이 포인트터널링보다 subthreshold swing(SS), on-current에서 더 높은 성능을 보인다. 본 논문은 Silicon, Germanium, Si-Ge Hetero TFET구조에서 게이트 길이를 소스영역으로 오버랩될 경우에 포인트 터널링과 라인터널링의 효과를 조사해서 SS와 on-current에 최적합한 구조의 가이드라인을 제시한다.

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Compact Current Model of Single-Gate/Double-Gate Tunneling Field-Effect Transistors

  • Yu, Yun Seop;Najam, Faraz
    • Journal of Electrical Engineering and Technology
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    • 제12권5호
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    • pp.2014-2020
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    • 2017
  • A compact current model applicable to both single-gate (SG) and double-gate (DG) tunneling field-effect transistors (TFETs) is presented. The model is based on Kane's band-to-band tunneling (BTBT) model. In this model, the well-known and previously-reported quasi-2-D solution of Poisson's equation is used for the surface potential and length of the tunneling path in the tunneling region. An analytical tunneling current expression is derived from expressions of derivatives of local electric field and surface potential with respect to tunneling direction. The previously reported correction factor with three fitting parameters, compensating for superlinear onset and saturation current with drain voltage, is used. Simulation results of the proposed TFET model are compared with those from a technology computer-aided-design (TCAD) simulator, and good agreement in all operational bias is demonstrated. The proposed SG/DG-TFET model is developed with Verilog-A for circuit simulation. A TFET inverter is simulated with the Verilog-A SG/DG-TFET model in the circuit simulator; the model exhibits typical inverter characteristics, thereby confirming its effectiveness.

L형 터널 트랜지스터의 트랩-보조-터널링 현상 조사 (Investigation of Trap-Assisted-Tunneling Mechanism in L-Shaped Tunneling Field-Effect-Transistor)

  • 파라즈 나잠;유윤섭
    • 한국정보통신학회:학술대회논문집
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    • 한국정보통신학회 2018년도 추계학술대회
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    • pp.512-513
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    • 2018
  • 트랩-보조-터널링(Trap-Assisted-Tunneling; TAT)은 실제 터널링 전계 효과 트랜지스터 (TFET)의 임계 이하 기울기를 저하시키고 시뮬레이션에서 고려되어야한다. 그러나, 그 메커니즘은 라인 터널링 타입 L형 TFET(LTFET)에서는 잘 알려져 있지 않았다. 본 연구는 dynamic nonlocal Schenk 모델을 이용한 LTFET의 TAT 메커니즘을 연구한다. 이 연구에서는 터널링 이벤트를 위해서 phonon assisted and direct band가 모두 고려되었다.

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Analysis of Tunnelling Rate Effect on Single Electron Transistor

  • Sheela, L.;Balamurugan, N.B.;Sudha, S.;Jasmine, J.
    • Journal of Electrical Engineering and Technology
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    • 제9권5호
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    • pp.1670-1676
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    • 2014
  • This paper presents the modeling of Single Electron Transistor (SET) based on Physical model of a device and its equivalent circuit. The physical model is derived from Schrodinger equation. The wave function of the electrode is calculated using Hartree-Fock method and the quantum dot calculation is obtained from WKB approximation. The resulting wave functions are used to compute tunneling rates. From the tunneling rate the current is calculated. The equivalent circuit model discuss about the effect of capacitance on tunneling probability and free energy change. The parameters of equivalent circuit are extracted and optimized using genetic algorithm. The effect of tunneling probability, temperature variation effect on tunneling rate, coulomb blockade effect and current voltage characteristics are discussed.

Gate Tunneling Current and QuantumEffects in Deep Scaled MOSFETs

  • Choi, Chang-Hoon;Dutton, Robert W.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제4권1호
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    • pp.27-31
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    • 2004
  • Models and simulations of gate tunneling current for thinoxide MOSFETs and Double-Gate SOIs are discussed. A guideline in design of leaky MOS capacitors is proposed and resonant gate tunneling current in DG SOI simulated based on quantum-mechanicalmodels. Gate tunneling current in fully-depleted, double-gate SOI MOSFETs is characterized based on quantum-mechanical principles. The simulated $I_G-V_G$ of double-gate SOI has negative differential resistance like that of the resonant tunnel diodes.

HgCdTe 광 다이오드의 터널링 전류 계산 (Tunneling Current Calculation in HgCdTe Photodiode)

  • 박장우;곽계달
    • 전자공학회논문지A
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    • 제29A권9호
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    • pp.56-64
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    • 1992
  • Because of a small bandgap energy, a high doping density, and a low operating temperature, the dark current in HgCdTe photodiode is almost composed of a tunneling current. The tunneling current is devided into an indirect tunneling current via traps and a band-to-band direct tunneling current. The indirect tunneling current dominates the dark current for a relatively high temperature and a low reverse bias and forward bias. For a low temperature and a high reverse bias the direct tunneling current dominates. In this paper, to verify the tunneling currents in HgCdTe photodiode, the new tunneling-recombination equation via trap is introduced and tunneling-recombination current is calculated. The new tunneling-recombination equation via trap have the same form as SRH (Shockley-Read-Hall) generation-recombination equation and the tunneling effect is included in recombination times in this equation. Chakrabory and Biswas's equation being introduced, band to band direct tunneling current are calculated. By using these equations, HgCdTe (mole fraction, 0.29 and 0.222) photodiodes are analyzed. Then the temperature dependence of the tunneling-recombination current via trap and band to band direct tunneling current are shown and it can be known what is dominant current according to the applied bias at athe special temperature.

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