• 제목/요약/키워드: Trigger circuit

검색결과 113건 처리시간 0.023초

제논 플래시 램프 구동장치를 위한 트리거 회로 설계 및 구현 (Design and Implementation of a Trigger Circuit for Xenon Flash Lamp Driver)

  • 송승호;조찬기;박수미;박현일;배정수;장성록;류홍제
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2017년도 전력전자학술대회
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    • pp.138-139
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    • 2017
  • This paper describes the design and implementation of a trigger circuit which can be series connected with main pulse circuit for a xenon flash lamp driver. For generating high voltage, the trigger circuit is designed as an inductive energy storage pulsed power modulator with 2 state step-up circuit consisting of a boost converter and a flyback circuit. In order to guarantee pulse width, a resonant capacitor on the output side of the flyback circuit is designed. This capacitor limits the output voltage to protect the flyback switch. In addition, to protect another power supply of xenon flash lamp driver from trigger pulse, the high voltage transformer which can carry the full current of main pulse is designed. To verify the proposed design, the trigger circuit is developed with the specification of maximum 23 kV, 0.6 J/pulse output and tested with a xenon flash lamp driver consisting of a main pulse circuit and a simmer circuit.

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전력변환차단기의 트리거 기구 최적화 (Optimization ova Mechanism for Power Transfer Breakers)

  • 조두현;김권희
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2002년도 춘계학술대회 논문집
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    • pp.735-739
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    • 2002
  • PTB(Power Transfer Breaker) is a device which incorporate the functions of ACB(Air Circuit Breaker) and ATS(Automatic Transfer Switch). ACB is a circuit breaker against overload and ATS is a switching device to transfer the load between two electric power sources. An existing PTB design based upon the 5 bar & cam mechanism has been regarded to be too complex and thus a simpler 4 bar mechanism with trigger lock is proposed. Experimentation and optimization of the trigger lock is presented.

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Wide Voltage Input Receiver with Hysteresis Characteristic to Reduce Input Signal Noise Effect

  • Biswas, Arnab Kumar
    • ETRI Journal
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    • 제35권5호
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    • pp.797-807
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    • 2013
  • In this paper, an input receiver with a hysteresis characteristic that can work at voltage levels between 0.9 V and 5 V is proposed. The input receiver can be used as a wide voltage range Schmitt trigger also. At the same time, reliable circuit operation is ensured. According to the research findings, this is the first time a wide voltage range Schmitt trigger is being reported. The proposed circuit is compared with previously reported input receivers, and it is shown that the circuit has better noise immunity. The proposed input receiver ends the need for a separate Schmitt trigger and input buffer. The frequency of operation is also higher than that of the previously reported receiver. The circuit is simulated using HSPICE at 0.35-${\mu}m$ standard thin oxide technology. Monte Carlo analysis is conducted at different process conditions, showing that the proposed circuit works well for different process conditions at different voltage levels of operation. A noise impulse of ($V_{CC}/2$) magnitude is added to the input voltage to show that the receiver receives the correct logic level even in the presence of noise. Here, $V_{CC}$ is the fixed voltage supply of 3.3 V.

Design of SCR-Based ESD Protection Circuit for 3.3 V I/O and 20 V Power Clamp

  • Jung, Jin Woo;Koo, Yong Seo
    • ETRI Journal
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    • 제37권1호
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    • pp.97-106
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    • 2015
  • In this paper, MOS-triggered silicon-controlled rectifier (SCR)-based electrostatic discharge (ESD) protection circuits for mobile application in 3.3 V I/O and SCR-based ESD protection circuits with floating N+/P+ diffusion regions for inverter and light-emitting diode driver applications in 20 V power clamps were designed. The breakdown voltage is induced by a grounded-gate NMOS (ggNMOS) in the MOS-triggered SCR-based ESD protection circuit for 3.3 V I/O. This lowers the breakdown voltage of the SCR by providing a trigger current to the P-well of the SCR. However, the operation resistance is increased compared to SCR, because additional diffusion regions increase the overall resistance of the protection circuit. To overcome this problem, the number of ggNMOS fingers was increased. The ESD protection circuit for the power clamp application at 20 V had a breakdown voltage of 23 V; the product of a high holding voltage by the N+/P+ floating diffusion region. The trigger voltage was improved by the partial insertion of a P-body to narrow the gap between the trigger and holding voltages. The ESD protection circuits for low- and high-voltage applications were designed using $0.18{\mu}m$ Bipolar-CMOS-DMOS technology, with $100{\mu}m$ width. Electrical characteristics and robustness are analyzed by a transmission line pulse measurement and an ESD pulse generator (ESS-6008).

제논 램프 구동용 트리거 및 지머 통합 회로 (Integrated High Voltage Trigger and Simmer power supply for Xenon Lamp)

  • 가재예;조찬기;송승호;정우철;박현일;류홍제
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2018년도 전력전자학술대회
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    • pp.51-53
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    • 2018
  • This paper describes the design and implementation of a circuit consisting of a simmer power supply unit and a series trigger unit that can be applicable to xenon lamp driving. An LCC resonant converter based on the continuous conduction mode (CCM) is applied to the simmer circuit and by using the current output control it is possible to maintain the ionization of the lamp which has the negative resistance load characteristic. At the same time, in order to generate a high voltage, a series trigger circuit which has a number of capacitors and diodes is designed. The generated high trigger output voltage could ionize the xenon gas. This paper explains the configuration and features of the integrated circuit system, and verifies the proposed design and stable operation of the xenon lamp. The experimental and simulation results show the not only rationality but also stability of the proposed circuit.

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브리지 인버어터 회로의 해석 (Analysis of Bridge Inverter Circuit)

  • 박준열
    • 대한전자공학회논문지
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    • 제15권3호
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    • pp.30-34
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    • 1978
  • 병렬 공진회로를 부하로 하는 브리지 인버어터를 해석하였다. 본 논문에서는 실제 회로설계에 필요한 트리거주파수의 한계, SCR 턴-오프 시간의 제한 범위 및 콘덴서의 최대 전압과 트리거속도에 따른 부하전류값을 구하였다.

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온도 보상기능을 갖는 내장형RC OSCILLATOR 설계 (Design of an Embedded RC Oscillator With the Temperature Compensation Circuit)

  • 김성식;조경록
    • 대한전자공학회논문지SD
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    • 제40권4호
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    • pp.42-50
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    • 2003
  • 본 논문에서는 시스템의 클럭을 안정적으로 공급하는 집적화 한 내장형 RC oscillator의 구현에 관한 논문이다. 기존의 RC oscillator는 온도에 따라 주파수변화가 약 15%정도 변화가 있는데 이는 온도에 따른 저항값의 변화와 schmit trigger의 기준전압이 온도에 따라 변화하기 때문이다. 본 연구에서는 온도에 따른 주파수 변화를 최소화하는 방법으로 CMOS bandgap과 온도에 따른 전류의 변화를 이용하였다. CMOS bandgap으로 기준 전압을 얻고 온도에 따라 증가하는 전류원과 온도에 따라 감소 하는 전류원을 서로 합하면 온도에 따라 일정한 전류를 얻어 주파수의 변화를 약 3%이내로 유지하는 회로를 제안한다.

다구찌 법을 이용한 전력전환차단기의 설계 (Design of an power transfer breaker by Taguchi method)

  • 김경선;김권희
    • 대한기계학회:학술대회논문집
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    • 대한기계학회 2001년도 추계학술대회논문집A
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    • pp.810-814
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    • 2001
  • power transfer breaker is a device used to transfer the load from the electricity power line to the emergency generators. In case of overload, it also functions as a circuit breaker. In this work, a new mechanism for the device is suggested. Among the various design challenges, optimization of the trigger mechanism is identified as of central importance. Optimal design decisions are made with the use of Taguchi method.

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Compact Power-on Reset Circuit Using a Switched Capacitor

  • Seong, Kwang-Su
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권5호
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    • pp.625-631
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    • 2014
  • We propose a compact power-on reset circuit consisting of a switched capacitor, a capacitor, and a Schmitt trigger inverter. A switched capacitor working with a clock signal charges the capacitor. Thus, the voltage across the capacitor is increased toward the supply voltage. The circuit provides a reset pulse until the voltage across the capacitor reaches the high threshold voltage of the Schmitt trigger inverter. The proposed circuit is simple, compact, has no static power consumption, and works for a wide range of power-on rising times. Furthermore, the clock signal is available while the reset pulse is activated. The proposed circuit works for up to 6 s of power-on rising time, and occupies a $60{\times}30{\mu}m^2$ active area.

Floating-Body기술을 이용한 낮은 트리거 전압을 갖는 GCNMOS 기반의 ESD 보호회로에 관한 연구 (A Study on GCNMOS-based ESD Protection Circuit Using Floating-Body Technique With Low Trigger Voltage)

  • 정준모
    • 전기전자학회논문지
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    • 제21권2호
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    • pp.150-153
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    • 2017
  • 본 논문에서는 Floating기술을 이용한 GCNMOS 기반의 ESD(Electrostatic Discharge)보호회로를 제안한다. 제안된 보호회로의 특성 분석을 위해서 시놉시스사의 TCAD 시뮬레이션을 이용하였으며 기존의 GGNMOS, GCNMOS와 비교 분석하였다. 제안된 보호회로는 Gate coupling과 Body floating기술을 적용하였으며 기존 ESD보호회로인 GGNMOS, GCNMOS와 비교하여 더 낮은 4.86V의 트리거 전압 및 1.47ns의 짧은 턴-온 타임 특성을 갖는다.