• 한국재료학회지
• /
• 제13권5호
• /
• pp.279-284
• /
• 2003

The $CoSi_2$ process is widely employed in a salicide as well as an ohmic layer process. In this experiment, we investigated the characteristics of $CoSi_2$ films by combinations of I-type (TiN 100$\AA$/Co 150$\AA$), II-type(TiN 100$\AA$/Co 150$\AA$/Ti 50$\AA$), III-type(Ti 100$\AA$/Co 150$\AA$/Ti 50$\AA$), and IV-type(Ti 100$\AA$/Co 150$\AA$/Ti 100$\AA$). Sheet resistances of $CoSi_2$ show the lowest resistance with 2.9 $\Omega$/sq. in a TiN/Co condition and much higher resistances in conditions simultaneously applying Ti capping layers and Ti interlayers. Though we couldn't observe a $CoSi_2$roughness dependence on the film stacks from RMS values, Ti capping layers turned into 78∼94$\AA$ thick TiN layers of (200) preferred orientation at $N_2$ambient. In addition, Ti interlayers helped to form the epitaxial $CoSi_2$with (200) preferred orientation and ternary compounds of Co-Ti-Si. We propose that film structures of II-type and III-type may be appropriate in the salicide process and the ohmic layer process from the viewpoint of Co diffusion kinetics and the CoSi$_2$epitaxy.

• 한국재료학회지
• /
• 제22권4호
• /
• pp.202-206
• /
• 2012

$CoSi_2$ was formed through annealing of atomic layer deposition Co thin films. Co ALD was carried out using bis(N,N'-diisopropylacetamidinato) cobalt ($Co(iPr-AMD)_2$) as a precursor and $NH_3$ as a reactant; this reaction produced a highly conformal Co film with low resistivity ($50\;{\mu}{\Omega}cm$). To prevent oxygen contamination, $ex-situ$ sputtered Ti and $in-situ$ ALD Ru were used as capping layers, and the silicide formation prepared by rapid thermal annealing (RTA) was used for comparison. Ru ALD was carried out with (Dimethylcyclopendienyl)(Ethylcyclopentadienyl) Ruthenium ((DMPD)(EtCp)Ru) and $O_2$ as a precursor and reactant, respectively; the resulting material has good conformality of as much as 90% in structure of high aspect ratio. X-ray diffraction showed that $CoSi_2$ was in a poly-crystalline state and formed at over $800^{\circ}C$ of annealing temperature for both cases. To investigate the as-deposited and annealed sample with each capping layer, high resolution scanning transmission electron microscopy (STEM) was employed with electron energy loss spectroscopy (EELS). After annealing, in the case of the Ti capping layer, $CoSi_2$ about 40 nm thick was formed while the $SiO_x$ interlayer, which is the native oxide, became thinner due to oxygen scavenging property of Ti. Although Si diffusion toward the outside occurred in the Ru capping layer case, and the Ru layer was not as good as the sputtered Ti layer, in terms of the lack of scavenging oxygen, the Ru layer prepared by the ALD process, with high conformality, acted as a capping layer, resulting in the prevention of oxidation and the formation of $CoSi_2$.

• 한국재료학회지
• /
• 제13권7호
• /
• pp.460-464
• /
• 2003

Ni and Ti films were deposited by the thermal evaporator, and then annealed in the N$_2$ ambient at 300-80$0^{\circ}C$ in a RTA(rapid thermal annealing) system. Four point probe, AEM, FESEM, AES, and XPS were used to study the effects of Ti-capping layers on the thermal stability of NiSi thin films. The Ti-capped NiSi was stable up to $700^{\circ}C$ for 100 sec. RTA, while the uncapped NiSi layers showed high sheet resistance after $600^{\circ}C$. These results were due to that the Ni in-diffusion and Si out-diffusion were retarded by the capping layer, resulting in the suppression of the formation of NiSi$_2$and Si grains at the surface.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2002년도 추계학술대회 논문집 Vol.15
• /
• pp.167-170
• /
• 2002

The influence of Si surface damage on Ni-silicide with TiN Capping layer and the effect of $H_2$ anneal are characterized. Si surface is intentionally damaged using Ar Sputtering. The sheet resistance of NiSi formed on damaged silicon increased rapidly as Ar sputtering time increased. However, the thermal stability of Ni-Si on the damage silicon was more stable than that on at undamaged Si, which means that damaged region retards the formation of NiSi. It was shown that $H_2$ anneal and TiN capping is highly effective in reducing NiSi sheet resistance.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2004년도 추계학술대회 논문집 Vol.17
• /
• pp.45-48
• /
• 2004

본 논문은 니켈실리사이드 (Ni-Silicide)의 열안정성을 개선하기 위해서 Ti와 TiN capping 층을 이용한 새로운 구조 Ni/Ti/Ni/Tin 구조를 제안하였다. 계면특성과 열안정성을 향상시키기 위해 타이타늄(Ti)을 니켈(Nickel) 사이에 적용하고, 니켈 실리사이드 형성 시 산소와의 반응을 억제하여 실리사이드의 응집현상을 개선시키고자 TiN capping을 적용 하였다. 니켈 실리사이드의 형성온도에 따른 $NiSi_2$로의 상변이를 억제할 수 있었고, 열안정성 평가를 위한 $700^{\circ}C$, 30분간 고온 열처리에서도 제안한 구조로 니켈실리사이드의 단면특성과 19 % 정도 면저항 특성을 개선하였다.

• 한국전기전자재료학회논문지
• /
• 제16권4호
• /
• pp.280-285
• /
• 2003

The influence of silicon surface damage on nickel-silicide (NiSi) has been characterized and H$_2$ anneal and TiN rapping has been applied to suppress the electrical, morphological deterioration phenomenon incurred by the surface damage. The substrate surface is intentionally damaged using Ar IBE (Ion beam etching) which can Precisely control the etch depth. The sheet resistance of NiSi increased about 18% by the surface damage, which is proven to be mainly due to the reduced silicide thickness. It is shown that simultaneous application of H: anneal and TiN capping layer is highly effective in suppressing the surface damage effect.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
• /
• pp.237-240
• /
• 2002

In this W, a NiSi technology suitable for sub-100nm CMOS sevice is proposed. It seems that capping layer has little effect on the sheet resistance and junction leakage current when there is no thermal treatment. However, there happened agglomeration and drastic increase of Junction leakage current without capping layer. In other word, capping layer especially TiN capping layer is highly effective in suppressing thermal effect. It is shown that the sheet resistance of 0.12${\mu}{\textrm}{m}$ linewidth and shallow p+/n junction with NiSi were stable up to 700 t /30 minute thermal treatment.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2002년도 하계학술대회 논문집
• /
• pp.288-291
• /
• 2002

Application of metal silicides such as TiSi$_2$ and CoSi$_2$ as contacts and gate electrodes are being studied. However, TiSi$_2$ due to the linewidth-dependance, and CoSi$_2$ due to the excessive Si consumption during silicidation cannot be applied to the deep-submicron MOSFET device. NiSi shows no such problems and can be formed at the low temperature. But, NiSi shows thermal instability. In this investigation, NiSi was formed with a Ti-capping layer to improve the thermal stability. Ni and Ti films were deposited by the thermal evaporator. The samples were then annealed in the N$_2$ ambient at 300-800$^{\circ}C$ in a RTA (rapid thermal annealing) system. Four point probe, FESEM, and AES were used to study the thermal properties of Ti-capped NiSi layers. The Ti-capped NiSi was stable up to 700$^{\circ}C$ for 100 sec. RTA, while the uncapped NiSi layers showed high sheet resistance after 600$^{\circ}C$. The AES results revealed that the Ni diffusion further into the Si substrate was retarded by the capping layer, resulting in the suppression of agglomeration of NiSi films.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
• /
• pp.15-16
• /
• 2006

The thermal stability of nickel silicide with compressively and tensilely stressed nitride capping layer has been investigated in this study. The Ni (10 nm) and Ni/Co/TiN (7/3/25 nm) structures were deposited on the p-type Si substrate. The stressed capping layer was deposited using plasma enhanced chemical vapor deposition (PECVD) after silicide formation by one-step rapid thermal process (RTP) at $500^{\circ}C$ for 30 sec. It was found that the thermal stability of nickel silicide depends on the stress induced by the nitride capping layer. In the case of Ni (10 nm) structure, the high compressive sample shows the best thermal stability, whereas in the case of Ni/Co/TiN (7/3/25 nm) structure, the high compressive sample shows the worst thermal stability.

• 한국반도체및디스플레이장비학회:학술대회논문집
• /
• 한국반도체및디스플레이장비학회 2007년도 춘계학술대회
• /
• pp.193-198
• /
• 2007

The NiSi is very promising candidate for the metallization in 60nm CMOS process such as FUSI(fully silicided) gate and source/drain contact because it exhibits non-size dependent resistance, low silicon consumption and mid-gap workfunction. Ni film was first deposited by using ALD (atomic layer deposition) technique with Bis-Ni precursor and $H_2$ reactant gas at $220^{\circ}C$ with deposition rate of $1.25{\AA}/cycle$. The as-deposited Ni film exhibited a sheet resistance of $5{\Omega}/{\square}$. RTP (repaid thermal process) was then performed by varying temperature from $400^{\circ}C$ to $900^{\circ}C$ in $N_2$ ambient for the formation of NiSi. The process window temperature for the formation of low-resistance NiSi was estimated from $600^{\circ}C$ to $800^{\circ}C$ and from $700^{\circ}C$ to $800^{\circ}C$ with and without Ti capping layer. The respective sheet resistance of the films was changed to $2.5{\Omega}/{\square}$ and $3{\Omega}/{\square}$ after silicidation. This is because Ti capping layer increases reaction between Ni and Si and suppresses the oxidation and impurity incorporation into Ni film during silicidation process. The NiSi films were treated by additional thermal stress in a resistively heated furnace for test of thermal stability, showing that the film heat-treated at $800^{\circ}C$ was more stable than that at $700^{\circ}C$ due to better crystallinity.