• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.7
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• pp.387-393
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• 2016

Threshold voltage shift has been observed from many thin-film transistors (TFTs) and the time evolution of the shift can be modeled as the stretched-exponential and -hyperbola function. These analytic models are derived from the kinetic equation for defect-creation or charge-trapping and the equation consists of only reversible reactions. In reality TFT's a shift is permanent due to an irreversible reaction and, as a result, it is reasonable to consider that both reversible and irreversible reactions exist in a TFT. In this paper the case when both reactions exist in parallel and make a combined threshold voltage shift is modeled and simulated. The results show that a combined threshold voltage shift observed from a TFT may agrees with the analytic models and, thus, the analytic models don't guarantee whether the cause of the shift is defection-creation or charge-trapping.

• Journal of the Semiconductor & Display Technology
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• v.19 no.1
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• pp.61-66
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• 2020

Threshold voltage shift occurring during operation is implemented in a SPICE simulation tool. Among the shift models the stretched-exponential function model, which is frequently observed from both single-crystal silicon and thin-film transistors regardless of the nature of causes, is selected, adapted to transient simulation, and added to BSIM4 developed by BSIM Research Group at the University of California, Berkeley. The adaptation method used in this research is to select degradation and recovery models based on the comparison between the gate and threshold voltages. The threshold voltage shift is extracted from SPICE transient simulation and shows the stretched-exponential time dependence for both degradation and recovery situations. The implementation method developed in this research is not limited to the stretched-exponential function model and BSIM model. The proposed method enables to perform transient simulation with threshold voltage shift in situ and will help to verify the reliability of a circuit.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.36 no.2
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• pp.129-135
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• 2023

An analytical threshold voltage model is presented to observe the change in threshold voltage shift ΔV_th of a junctionless double gate MOSFET using ferroelectric-metal-SiO₂ as a gate oxide film. The negative capacitance transistors using ferroelectric have the characteristics of increasing on-current and lowering off-current. The change in the threshold voltage of the transistor affects the power dissipation. Therefore, the change in the threshold voltage as a function of theferroelectric thickness is analyzed. The presented threshold voltage model is in a good agreement with the results of TCAD. As a results of our analysis using this analytical threshold voltage model, the change in the threshold voltage with respect to the change in the ferroelectric thickness showed that the threshold voltage increased with the increase of the absolute value of charges in the employed ferroelectric. This suggests that it is possible to obtain an optimum ferroelectric thickness at which the threshold voltage shift becomes 0 V by the voltage across the ferroelectric even when the channel length is reduced. It was also found that the ferroelectric thickness increased as the silicon thickness increased when the channel length was less than 30 nm, but the ferroelectric thickness decreased as the silicon thickness increased when the channel length was 30 nm or more in order to satisfy ΔV_th=0.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.7
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• pp.1311-1316
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• 2016

This paper analyzes the influence of tunneling current on threshold voltage shift by channel length of short channel asymmetric double gate(DG) MOSFET. Tunneling current significantly increases by decrease of channel length in the region of 10 nm below, and the secondary effects such as threshold voltage shift occurs. Threshold voltage shift due to tunneling current is not negligible even in case of asymmetric DGMOSFET to develop for reduction of short channel effects. Off current consists of thermionic and tunneling current, and the ratio of tunneling current is increasing with reduction of channel length. The WKB(Wentzel-Kramers-Brillouin) approximation is used to obtain tunneling current, and potential distribution in channel is hermeneutically derived. As a result, threshold voltage shift due to tunneling current is greatly occurred for decreasing of channel length in short channel asymmetric DGMOSFET. Threshold voltage is changing according to bottom gate voltages, but threshold voltage shifts is nearly constant.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.4
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• pp.789-794
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• 2017

Subthreshold current model is presented using analytical potential distribution of junctionless cylindrical surrounding-gate (CSG) MOSFET and threshold voltage shift is analyzed by this model. Junctionless CSG MOSFET is significantly outstanding for controllability of gate to carrier flow due to channel surrounded by gate. Poisson's equation is solved using parabolic potential distribution, and subthreshold current model is suggested by center potential distribution derived. Threshold voltage is defined as gate voltage corresponding to subthreshold current of $0.1{\mu}A$, and compared with result of two dimensional simulation. Since results between this model and 2D simulation are good agreement, threshold voltage shift is investigated for channel dimension and doping concentration of junctionless CSG MOSFET. As a result, threshold voltage shift increases for large channel radius and oxide thickness. It is resultingly shown that threshold voltage increases for the large difference of doping concentrations between source/drain and channel.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.3
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• pp.154-159
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• 2015

In this paper, we propose a numerical method to model temperature dependent threshold voltage shift observed in metal oxide thin-film transistors (TFTs). The proposed model is then implemented in AIM-SPICE circuit simulation tool. The proposed method consists of modeling the well-known stretched-exponential time dependent threshold voltage shift and their temperature dependent coefficients. The outputs from AIM-SPICE tool and the stretched-exponential model at different temperatures in the literature are compared and they show a good agreement. Since metal oxide TFTs are the promising candidate for flat panel displays, the proposed method will be a good stepping stone to help enhance reliability of fast-evolving display circuits.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1176-1178
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• 2007

A novel integrated a-Si:H gate driver with high reliability has been designed and simulated. Since the a-Si:H TFT is easily degraded by gate bias stress, we should optimize the circuit considering the threshold voltage shift. The conventional circuit shows voltage drop at the input stage by threshold voltage of the TFT, however, the proposed circuit dose not shows voltage drop and keeps constant regardless of threshold voltage shift of the TFT.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.2
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• pp.92-97
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• 2013

In this paper the author proposes a method of implementing a numerical model for threshold voltage ($V_{th}$) shift in organic thin-film transistors (OTFTs) into SPICE tools. $V_{th}$ shift is first numerically modeled by dividing the shift into sequentially ordered groups. The model is then used to derive a simulations model which takes into simulation parameters and calculation complexity. Finally, the numerical and simulation models are implemented in AIM-SPICE. The SPICE simulation results agree well with the $V_{th}$ shift obtained from an OTFT fabricated without any optimization. The proposed method is also used to implement the stretched-exponential time dependent $V_{th}$ shift in AIM-SPICE and the results show the proposed method is applicable to various types of $V_{th}$ shifts.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.517-520
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• 2008

A voltage-programming pixel circuit, which compensates the threshold voltage shift of TFTs and the degradation of OLED, is proposed for large sized a-Si:H active matrix organic light emitting diode (AMOLED) applications. Considering threshold voltage variation (or shift), OLED degradation and reverse bias annealing, HSPICE simulation results indicate that luminance error of every gray level is less than 0.4 LSB under the condition of +1V threshold voltage shift and from -0.2 LSB to 2.6 LSB within 30% degradation of OLED in the case of 40-inch full HDTV condition.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.4
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• pp.903-908
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• 2015

This paper has analyzed threshold voltage shift for doping profile of asymmetric double gate(DG) MOSFET. Ion implantation is usually used in process of doping for semiconductor device and doping profile becomes Gaussian distribution. Gaussian distribution function is changed for projected range and standard projected deviation, and influenced on transport characteristics. Therefore, doping profile in channel of asymmetric DGMOSFET is affected in threshold voltage. Threshold voltage is minimum gate voltage to operate transistor, and defined as top gate voltage when drain current is $0.1{\mu}A$ per unit width. The analytical potential distribution of series form is derived from Poisson's equation to obtain threshold voltage. As a result, threshold voltage is greatly changed by doping profile in high doping range, and the shift of threshold voltage due to projected range and standard projected deviation significantly appears for bottom gate voltage in the region of high doping concentration.