• Korean Journal of Logic
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• v.8 no.2
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• pp.85-107
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• 2005

Kleene first investigated a three-valued system which follows the evaluations of the Lukasiewicz infinite-valued logic ${\L}C$ with respect to negation, conjunction, and disjunction, and treats $\rightarrow$ as material-like implication in the sense that A $\rightarrow$ B is defined as ${\sim}A{\vee}B$ in its evaluation. Diense and Rescher extended it to many-valued logic and infinite-valued logic, respectively. This paper investigates a variant of the infinite-valued Kleene-Diense logic KD, which we shall call strong Kleene-Diense logic (sKD): sKD has the same evaluations as KD except that sKD takes a variant of Kleene-Diense implication. Following the idea of Dunn [2], we provide algebraic completeness for sKD together with its deduction theorem.

• Korean Journal of Logic
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• v.18 no.1
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• pp.65-83
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• 2015

This paper deals with non-algebraic Kripke-style semantics for three-valued paraconsistent logic: set-theoretical Kripke-style semantics. We first recall two three-valued paraconsistent systems. We next introduce set-theoretical Kripke-style semantics for them.

• Korean Journal of Logic
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• v.17 no.3
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• pp.441-461
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• 2014

This paper deals with one sort of Kripke-style semantics for three-valued paraconsistent logic: algebraic Kripke-style semantics. We first introduce two three-valued systems, define their corresponding algebraic structures, and give algebraic completeness results for them. Next, we introduce algebraic Kripke-style semantics for them, and then connect them with algebraic semantics.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.16 no.3
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• pp.147-156
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• 2016

A modalized Łukasiewicz three-valued propositional logic will be proposed in this paper which there are three modalities [t]; [m]; [f] to represent the three values t; m; f; respectively. And a Gentzen-typed deduction system will be given so that the the system is sound and complete with respect to the Łukasiewicz three-valued semantics Ł$_3$, which are given in soundness theorem and completeness theorem.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2008.04a
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• pp.311-312
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• 2008

Fuzzy logic is introduced by Zadeh in 1965. It has been continuously developed by many mathematicians and knowledge engineers all over the world. A lot of papers concerning with the history of mathematics and the mathematical education related with fuzzy logic, but there is no paper concerning with Zadeh. In this article, we investigate his life and papers about fuzzy logic. We also compare two-valued logic, three-valued logic, fuzzy logic, intuisionistic logic and intuitionistic fuzzy sets. Finally we discuss about the expression of intuitionistic fuzzy sets.

• Journal for History of Mathematics
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• v.21 no.1
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• pp.29-44
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• 2008

Fuzzy logic is introduced by Zadeh in 1965. It has been continuously developed by many mathematicians and knowledge engineers all over the world. A lot of papers concerning with the history of mathematics and the mathematical education related with fuzzy logic, but there is no paper concerning with Zadeh. In this article, we investigate his life and papers about fuzzy logic. We also compare two-valued logic, three-valued logic, fuzzy logic, intuisionistic logic and intuitionistic fuzzy sets. Finally we discuss about the expression of intuitionistic fuzzy sets.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1998.11a
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• pp.141-145
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• 1998

This paper CMOS full adder design method based on carry-propagation-free addition trees and a circuit technique, so called multiple-valued current-mode (MVCM) circuits. The carry-paopagation-free addition method uses a redundant digit sets called redundant positive-digit number representations. The carry-propagation-free addition is by three steps, and the adder can be designed directly and efficiently from the algorithm using MVCM circuit. We demonstrate the effectiveness of the proposed method through simulation(SPICE).

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1998.05a
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• pp.338-341
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• 1998

This paper presents CMOS full adder design method based on carry-propagation-free addition trees and a circuit technique, so called multiple-valued current-nude(MVCM) circuits. The carry-propagation-free addition method uses a redundant digit sets called redundant positive-digit number representations. The carry-propagation-free addition is by three steps, and the adder can be designed directly and efficiently from the algorithm using WVCM circuit, Also Multiplier can be designed by these adder. We demonstrate the effectiveness of the proposed method through simulation(SPICE).

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.8
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• pp.992-997
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• 1988

A generalized coding algorithm for multiple inputs multiple-valued logic gate based on shadow-casting is proposed. Proposed algorithm can minimize the useless pixels in case the number of inputs is not 2N (N is a natural number). A detailed analysis of advantages of proposed algorithm is presented and its effectiveness is demonstrated in case of three input binary system using inputs of 8*8 data.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.1
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• pp.52-58
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• 2006

Single-electron transistor (SET)-based logic cells and SET/FET hybrid integrated circuits have been fabricated on SOI chips. The input-output voltage transfer characteristic of the SET-based complementary logic cell shows an inverting behavior where the output voltage gain is estimated to be about 1.2 at 4.2K. The SET/FET output driver, consisting of one SET and three FETs, yields a high voltage gain of 13 and power amplification with a wide-range output window for driving next circuit. Finally, the SET/FET literal gate for a multi-valued logic cell, comprising of an SET, an FET and a constant-current load, displays a periodic voltage output of high/low level multiple switching with a swing as high as 200mV. The multiple switching functionality of all the fabricated logic circuits could be enhanced by utilizing a side gate incorporated to each SET component to enable the phase control of Coulomb oscillations, which is one of the unique characteristics of the SET-based logic circuits.