• Journal of Sensor Science and Technology
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• v.29 no.5
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• pp.328-331
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• 2020

In this study, a highly crystalline SnO₂ thin film was formed using a sol-gel process. In addition, a SnO₂ thin-film transistor was successfully fabricated. The fabricated SnO₂ thin-film transistor exhibited conventional n-type semiconductor properties, with a mobility of 0.1 cm² V^-1 s^-1, an on/off current ratio of 1.2 × 10⁵, and a subthreshold swing of 2.69. The formed SnO₂ had a larger bandgap (3.95 eV) owing to the bandgap broadening effect. The fabricated photosensor exhibited a responsivity of 1.4 × 10^-6 Jones, gain of 1.43 × 10⁷, detectivity of 2.75 × 10^-6 cm Hz^1/2 W^-1, and photosensitivity of 4.67 × 10².

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.36 no.5
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• pp.463-473
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• 2023

In recent years, the transparent amorphous oxide thin film transistor represented by indium-gallium-zinc-oxide (IGZO) has become the first choice of the next generation of integrated circuit control components. This article contributes an overview of IGZO thin-film transistors (TFTs), including their fundamental principles and recent advancements. The paper outlines various TFT structures and places emphasis on the fabrication process of the active layer. The result showed that the size of the active layer including the length-to-width ratio and the width could have a significant effect on the mobility. And the process of TFT could influence the crystal structure of IGZO thin film. Furthermore, the article presents an overview of recent applications of IGZO TFTs, such as their use in display drivers and TFT memories. At last, the future development of IGZO TFT is forecasted in this paper.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.5
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• pp.282-285
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• 2014

We have investigated the structural and electrical properties of Si-Zn-Sn-O (SZTO) thin films deposited by RF magnetron sputtering at various deposition temperatures from RT to $350^{\circ}C$. All the SZTO thin fims are amorphous structure. The mobility of SZTO thin film has been changed depending on the deposition temperature. SZTO thin film transistor shows mobility of 8.715 $cm^2/Vs$ at room temperature. We performed the electrical stress test by applying gate and drain voltage. SZTO thin film transistor shows good stability deposited at room temperature while showing poor stability deposited at $350^{\circ}C$. As a result, the electrical performance and stability have been changed depending on deposition temperature mainly because high deposition temperature loosened the amorphous structure generating more oxygen vacancies.

• Bulletin of the Korean Chemical Society
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• v.35 no.11
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• pp.3299-3302
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• 2014

The In2S3 thin films of tetragonal structure and In2O3 films of cubic structure were synthesized by a spin coating method from the organometallic compound precursor triethylammonium indium thioacetate ($[(Et)_3NH]^+[In(SCOCH_3)_4]^-$; TEA-InTAA). In order to determine the electron mobility of the spin-coated TEA-InTAA films, thin film transistors (TFTs) with an inverted structure using a gate dielectric of thermal oxide ($SiO_2$) was fabricated. These devices exhibited n-channel TFT characteristics with a field-effect electron mobility of $10.1cm^2V^{-1}s^{-1}$ at a curing temperature of $500^{\circ}C$, indicating that the semiconducting thin film material is applicable for use in low-cost, solution-processed printable electronics.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.118-118
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• 2011

The Nano-Floating Gate Memory(NFGM) devices with ZnO:Cu thin film embedded in Al2O3 and AlOx-SAOL were fabricated and the electrical characteristics were evaluated. To further improve the scaling and to increase the program/erase speed, the high-k dielectric with a large barrier height such as Al2O3 can also act alternatively as a blocking layer for high-speed flash memory device application. The Al2O3 layer and AlOx-SAOL were deposited by MLD system and ZnO:Cu films were deposited by ALD system. The tunneling layer which is consisted of AlOx-SAOL were sequentially deposited at $100^{\circ}C$. The floating gate is consisted of ZnO films, which are doped with copper. The floating gate of ZnO:Cu films was used for charge trap. The same as tunneling layer, floating gate were sequentially deposited at $100^{\circ}C$. By using ALD process, we could control the proportion of Cu doping in charge trap layer and observe the memory characteristic of Cu doping ratio. Also, we could control and observe the memory property which is followed by tunneling layer thickness. The thickness of ZnO:Cu films was measured by Transmission Electron Microscopy. XPS analysis was performed to determine the composition of the ZnO:Cu film deposited by ALD process. A significant threshold voltage shift of fabricated floating gate memory devices was obtained due to the charging effects of ZnO:Cu films and the memory windows was about 13V. The feasibility of ZnO:Cu films deposited between Al2O3 and AlOx-SAOL for NFGM device application was also showed. We applied our ZnO:Cu memory to thin film transistor and evaluate the electrical property. The structure of our memory thin film transistor is consisted of all organic-inorganic hybrid structure. Then, we expect that our film could be applied to high-performance flexible device.----못찾겠음......

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.1349_1350
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• 2009

Thin films of pp(ST-Co-VA) were fabricated by plasma deposition polymerization (PVDPM) technique. Properties of the plasma polymerized pp(ST-Co-VA) thin films were investigated for application to semiconductor device as insulator. Thickness, dielectric property, composition of the pp(ST-Co-VA) thin films were investigated considering the relationship with preparation condition such as gas pressure and deposition time. In order to verify the possibility of application to organic thin film transistor, a pentacene thin film was deposited on the pp(ST-Co-VA) insulator by vacuum thermal evaporation technique. Crystalline property of the pentacene thin film was investigated by XRD and SEM, FT-IR. Surface properties at the pp(ST-Co-VA)/pentacene interface was investigated by contact angle measurement. The pp(ST-Co-VA) thin film showed a high-k (k=4.6) and good interface characteristic with pentacene semiconducting layer, which indicates that it would be a promising material for organic thin film transistor (OTFT) application.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.1
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• pp.26-29
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• 2006

Transparent ZnO thin films were prepared by KrF pulsed laser deposition (PLD) technique and applied to a bottom-gate type thin film transistor device as an active channel layer. A high conductive crystalline Si substrate was used as an metal-like bottom gate and SiN insulating layer was then deposited by LPCVD(low pressure chemical vapour deposition). An aluminum layer was then vacuum evaporated and patterned to form a source/drain metal contact. Oxygen partial pressure and substrate temperature were varied during the ZnO PLD deposition process and their influence on the thin film properties were investigated by X-ray diffraction(XRD) and Hall-van der Pauw method. Optical transparency of the ZnO thin film was analyzed by UV-visible phometer. The resulting ZnO-TFT devices showed an on-off ration of $10^6$ and field effect mobility of 2.4-6.1 $cm^2/V{\cdot}s$.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.256-256
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• 2012

Oxide semiconductors such as zinc tin oxide (ZTO) or indium gallium zinc oxide (IGZO) have attracted a lot of research interest owing to their high potential for application as thin film transistors (TFTs) [1,2]. However, the instability of oxide TFTs remains as an obstacle to overcome for practical applications to electronic devices. Several studies have reported that the electrical characteristics of ZnO-based transistors are very sensitive to oxygen, hydrogen, and water [3,4,5]. To improve the reliability issue for the amorphous InGaZnO (a-IGZO) thin-film transistor, back channel passivation layer is essential for the long term bias stability. In this study, we investigated the instability of amorphous indium-gallium-zinc-oxide (IGZO) thin film transistors (TFTs) by the back channel contaminations. The effect of back channel contaminations (humidity or oxygen) on oxide transistor is of importance because it might affect the transistor performance. To remove this environmental condition, we performed vacuum seasoning before the deposition of hybrid passivation layer and acquired improved stability. It was found that vacuum seasoning can remove the back channel contamination if a-IGZO film. Therefore, to achieve highly stable oxide TFTs we suggest that adsorbed chemical gas molecules have to be eliminated from the back-channel prior to forming the passivation layers.

• Transactions on Electrical and Electronic Materials
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• v.14 no.1
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• pp.16-19
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• 2013

Frequency filters with various filtering wavelengths were used in the photoelectric characterization of hydrogenated amorphous silicon thin film transistor (a-Si:H TFT) and the experimental results were described and analyzed in terms of the photon energy spectral characteristics calculated from the integration of the photon energy and the spectral intensity of transmitted backlight through the filters at each wavelength. From the comparison of the photocurrents and the calculated photon energy spectrums for the filtered ranges of wavelength, it was possible to conclude that the photocurrents are closely related to the photon energy spectrums of the backlight.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.5
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• pp.364-369
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• 2011

Analyzing electrical degradation of polycrystalline silicon transistor to applicable at several environment is very important issue. In this research, after fabricating p channel poly crystalline silicon TFT (thin film transistor) electrical characteristics were compare and analized that changed by gate bias with first measurement. As a result on and off current was reduced by variation of gate bias and especially re duce ratio of off current was reduced by $7.1{\times}10^1$. On/off current ratio, threshold voltage and electron mobility increased. Also, when channel length gets shorter on/off current ratio was increased more and thresh old voltage increased less. It was cause due to electron trap and de-trap to gate silicon oxide by variation of gate bias.