• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.09a
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• pp.21-30
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• 2002

According the difference of flex substrate, (reel tape), there are three kind assembly types of LCD driver IC is COG, TCP and COF, respectively. The TCP is the maturest in these types for stability of raw material supply and other specification. And TCP is the major assembly type of LCD driver IC and the huge demand from Taiwan's large TFT LCD panel house since this spring. But due to its package structure and the raw material applied in this package, there is some limitation in fine pitch application of this package type, (TCP). So, COF will be very potential in compact and portable application comparison with TCP in the future. There are three kinds assembly methods in COF, one is ACF by using the anisotropic conductive film to connect the copper lead of tape and gold bump of IC, another is eutectic bonding by using the thermo-pressure to joint the copper lead of tape and gold bump of IC, and last is NCP by using non-conductive paste to adhere the copper lead of tape and gold bump of IC. To have a global realization, this paper will briefly review the status of Taiwan's large TFT panel house, the internal driver IC design house, and the back-end assembly house in the beginning. The different material property of raw material, PI tape is also compared in the paper. The more detail of three kinds of COF assembly method will be described and compared in this paper.

• Journal of Korean Vacuum Science & Technology
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• v.3 no.1
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• pp.33-37
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• 1999

We present, for the first time, a prototype active-matrix field emission display (AMFED) with 25$\times$25 pixels in which polycrystalline silicon fie이 emitter array (poly-Si FEA) and thin-film transistor (TFT) were monolityically intergrated on an insulating substrate. The FEAs showed relatively large electron emissions above at a gate voltage of 50 V, and the TFTs were designed to have low off-stage currents even though at high drain voltages. The intergrated poly-Si TFT controlled electron emissions of the poly-Si FEA actively, resulting in improvement in the emission stability and reliability along with a low-voltage control of field emission below 25V. With the prototype AMFED we have displayed character patterns by low-boltage pertipheral circuits of 15 V in a high vacuum chamber.

• Journal of Sensor Science and Technology
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• v.6 no.6
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• pp.483-490
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• 1997

Thin film Si has been used in sensors, radiation detectors, and solar cells. The carrier mobility of thin film Si influences the device behavior through its frequency response or time response. Since poly-Si shows the higher mobility value, a-Si:H films on Mo substrate were subjected to various crystallization treatments. Consequently, we need to find an appropriate method in mobility measurement before and after the anneal treatment. This paper investigates the carrier mobility improvement with anneal treatments and summarizes the mobility measurement methods of the a-Si:H and poly-Si film. Various techniques were investigated for the mobility determination such as Hall mobility, HS, TOF, SCLC, TFT, and TCO method. We learned that TFT and TCO method are suitable for the mobility determination of a-Si:H and poly-Si film. The measured mobility was improved by $2{\sim}3$ orders after high temperature anneal above $700^{\circ}C$ and grain boundary passivation using an RF plasma rehydrogenation.

• Journal of the Korean institute of surface engineering
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• v.43 no.1
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• pp.7-11
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• 2010

Solid phase crystallization (SPC) is a simple method in producing a polycrystalline phase by annealing amorphous silicon (a-Si) in a furnace environment. Main motivation of the crystallization technique is to fabricate low temperature polycrystalline silicon thin film transistors (LTPS-TFTs) on a thermally susceptible glass substrate. Studies on SPC have been naturally focused to the low temperature regime. Recently, fabrication of polycrystalline silicon (poly-Si) TFT circuits from a high temperature polycrystalline silicon process on steel foil substrates was reported. Solid phase crystallization of a-Si films proceeds by nucleation and growth. After nucleation polycrystalline phase is propagated via twin mediated growth mechanism. Elliptically shaped grains, therefore, contain intra-granular defects such as micro-twins. Both the intra-granular and the inter-granular defects reflect the crystallinity of SPC poly-Si. Crystallinity and SPC kinetics of high temperatures were compared to those of low temperatures using Raman analysis newly proposed in this study.

• Journal of the Semiconductor & Display Technology
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• v.9 no.4
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• pp.19-23
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• 2010

Nanoimprint lithography (NIL) is one of the most versatile and promising technology for micro/nano-patterning due to its simplicity, high throughput and low cost. Recently, one of the major trends of NIL is large-area patterning. Especially, the research of the application of NIL to TFT-LCD field has been increasing. Technical difficulties to keep the uniformity of the residual layer, however, become severer as the imprinting area increases. In this paper we performed a numerical study for a large area NIL (the $2^nd$ generation TFT-LCD glass substrate ($370{\times}470$ mm)) by using finite element method. First, a simple model considering the surrounding wall was established in order to simulate effectively and reduce the computing time. Then, the volume of fluid (VOF) and grid deformation method were utilized to calculate the free surfaces of the resist flow based on an Eulerian grid system. From the simulation, the velocity fields and the imprinting pressure during the filling process in the NIL were analyzed, and the effect of the surrounding wall and the uniformity of residual layer were investigated.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.34 no.2
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• pp.99-104
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• 2021

Ion-beam sputtering (IBS) was used to deposit semiconducting IZTO (indium zinc tin oxide) thin films onto heavily-doped Si substrates using a sintered ceramic target with the nominal composition In0.4Zn0.5Sn0.1O1.5, which could work as a channel layer for oxide TFT (oxide thin film transistor) devices. The crystallization behavior and electrical properties were examined for the films in terms of deposition parameters, i.e. target tilt angle and substrate temperature during deposition. The thickness uniformity of the films were examined using a stylus profilometer. The observed difference in electrical properties was not related to the degree of crystallization but to the deposition temperature which affected charge carrier concentration (n), electrical resistivity (ρ), sheet resistance (Rs), and Hall mobility (μH) values of the films.

• ETRI Journal
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• v.24 no.4
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• pp.290-298
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• 2002

We present, for the first time, a prototype active-matrix field emission display (AMFED) in which an amorphous silicon thin-film transistor (a-Si TFT) and a molybdenum-tip field emitter array (Mo-tip FEA) were monolithically integrated on a glass substrate for a novel active-matrix cathode (AMC) plate. The fabricated AMFED showed good display images with a low-voltage scan and data signals irrespective of a high voltage for field emissions. We introduced a light shield layer of metal into our AMC to reduce the photo leakage and back channel currents of the a-Si TFT. We designed the light shield to act as a focusing grid to focus emitted electron beams from the AMC onto the corresponding anode pixel. The thin film depositions in the a-Si TFTs were performed at a high temperature of above 360°C to guarantee the vacuum packaging of the AMC and anode plates. We also developed a novel wet etching process for $n^+-doped$ a-Si etching with high etch selectivity to intrinsic a-Si and used it in the fabrication of an inverted stagger TFT with a very thin active layer. The developed a-Si TFTs performed well enough to be used as control devices for AMCs. The gate bias of the a-Si TFTs well controlled the field emission currents of the AMC plates. The AMFED with these AMC plates showed low-voltage matrix addressing, good stability and reliability of field emission, and good light emissions from the anode plate with phosphors.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.12
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• pp.761-767
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• 1999

Poly-Si TFTs(polycrystalline silicon thin film transistors) fabricated on a low cost glass substrate have attracted a considerable amount of attention for pixel elements and peripheral driving circuits in AMLCS(active matrix liquid crystal display). In order to apply poly-Si TFTs for high resolution AMLCD, a high operating frequency and reliable circuit performances are desired. A new poly-Si TFT with CLBT(counter doped lateral body terminal) is proposed and fabricated to suppress kink effects and to improve the device stability. And this proposed device with BC(buried channel) is fabricated to increase ON-current and operating frequency. Although the troublesome LDD structure is not used in the proposed device, a low OFF-current is successfully obtained by removing the minority carrier through the CLBT. We have measured the dynamic properties of the poly-Si TFT device and its circuit. The reliability of the TFTs and their circuits after AC stress are also discussed in our paper. Our experimental results show that the BC enables the device to have high mobility and switching frequency (33MHz at $V_{DD}$ = 15 V). The minority carrier elimination of the CLBT suppresses kink effects and makes for superb dynamic reliability of the CMOS circuit. We have analyzed the mechanism in order to see why the ring oscillators do not operate by analyzing AC stressed device characteristics.

• Korean Journal of Materials Research
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• v.17 no.9
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• pp.484-488
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• 2007

Mo(Ti) alloy and pure Cu thin films were subsequently deposited on $SiO_2-coated$ Si wafers, resulting in $Cu/Mo(Ti)/SiO_2$ structures. The multi-structures have been annealed in vacuum at $100-600^{\circ}C$ for 30 min to investigate the outdiffusion of Ti to Cu surface. Annealing at high temperature allowed the outdiffusion of Ti from the Mo(Ti) alloy underlayer to the Cu surface and then forming $TiO_2$ on the surface, which protected the Cu surface against $SiH_4＋NH_3$ plasma during the deposition of $Si_3N_4$ on Cu. The formation of $TiO_2$ layer on the Cu surface was a strong function of annealing temperature and Ti concentration in Mo(Ti) underlayer. Significant outdiffusion of Ti started to occur at $400^{\circ}C$ when the Ti concentration in Mo(Ti) alloy was higher than 60 at.%. This resulted in the formation of $TiO_2/Cu/Mo(Ti)\;alloy/SiO_2$ structures. We have employed the as-deposited Cu/Mo(Ti) alloy and the $500^{\circ}C-annealed$ Cu/Mo(Ti) alloy as gate electrodes to fabricate TFT devices, and then measured the electrical characteristics. The $500^{\circ}C$ annealed Cu/Mo($Ti{\geq}60at.%$) gate electrode TFT showed the excellent electrical characteristics ($mobility\;=\;0.488\;-\;0.505\;cm^2/Vs$, on/off $ratio\;=\;2{\times}10^5-1.85{\times}10^6$, subthreshold = 0.733.1.13 V/decade), indicating that the use of Ti-rich($Ti{\geq}60at.%$) alloy underlayer effectively passivated the Cu surface as a result of the formation of $TiO_2$ on the Cu grain boundaries.

• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.209-209
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• 1999

현재 magnetron sputter는 반도체, LCD 등을 포함하는 microelectronics 산업에서 박막형성을 위한 주요 장비로 널리 쓰이고 있으며, 소자의 고집적화 및 대형화 추세에 따라 그 이용가치는 더욱 증대되고 있다. 본 연구엣는 TFT-LCD용 Color Filter 제조시 ITO박막형성을 위해 사용하는 magnetron sputter 내부의 플라즈마 분포 및 ion kinetic energy에 대한 해석을 실시하였으며, ITO target의 erosion 형상의 원인을 실험결과와 비교하였다. Magnetron sputtering은 target에 가해지는 bias 전압(DC 혹은 RF)에 의해 target과 shield 혹은 target과 substrate 사이에서 생성될 수 잇는 플라즈마를 target 및 부분에 붙어있는 영구자석을 이용하여 target 근처에 집중시키고, target 표면과 플라즈마 사이의 전위차에 의해 가속된 이온들이 target 표면과 충돌하여 이차 전자방출을 일으킴과 동시에 target 표면에서 sputtering을 일으키고, 이들 sputtered 된 중성의 atom 들이 substrate로 날아가 박막을 형성하는 원리로 작동된다. 이때 target에서 방출되는 이차전자들은 영구자석에 의한 자기장 효과에 의해 target 근처에 갇히게 되어 중성 기체분자들과 이온화반응을 통해 플라즈마를 유지하고 그 밀도를 높혀주는 역할을 담당하게 된다. 즉 낮은 압력 및 bias 전압에서도 플라즈마 밀도를 높일수 있고 sputtering 공정이 가능한 장점을 가지고 있다. Magnetron sputtering 현상에 대한 시뮬레이션은 크게 magnetron discharge와 sputtering에 대한 해석 두가지로 나누어 볼 수 있는데, sputtering 현상 자체를 수치묘사할 수 있는 정량적인 모델은 아직까지 명확하게 정립되어 있지 않다. 따라서 본 연구에서는 magnetron plasma 자체에 대한 수치해석에 주안점을 두고 아울러 bulk plasma 영역에서 target으로 입사하는 이온들의 입사에너지 및 입사각도 등을 Monte Carlo 방법으로 추적하여 sputtering 현상을 유추해보았다. Sputtering 현상을 살펴보기 위해 magnetron sputter 내 플라즈마 밀도, 전자온도, 특히 target 및 substrate를 충돌하는 이온의 입사에너지 및 입사각 분포등을 계산하는데 hybrid 방법으로 시뮬레이션을 하였다. 즉 ion과 bulk electron에 대해서는 fluid 방식으로 접근하고, 이차전자 운동과 그로 인한 반응관계 및 target으로 입사하는 이온의 에너지와 입사각 분포는 Monte-Carlo 방법으로 처리하였다. 정지기장해석의 경우 상용 S/W인 Vector Fields를 사용하였다. 이를 통해 sputter 내 플라즈마 특성, target으로 입사하는 이온에너지 및 각 분포, 이들이 target erosion 형상에 미치는 영향을 살펴보았다. 또한 이들 결과로부터 간단한 sputtering 모델을 사용하여 target으로부터 sputter된 입자들이 substrate에 부착되는 현상을 Monte-Carlo 방법으로 추적하여 성막특성도 살펴보았다.