• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.70-73
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• 2001

MFIS(Metal-ferroelectric-insulator- semiconductor) structures using silicon oxynitride(SiON) buffer layers were fabricatied and demonstrated nonvolatile memory operations. Oxynitride(SiON) films have been formed on p-Si(100) by RTP(rapid thermal process) in O$_2$+N$_2$ ambient at 1100$^{\circ}C$. The gate leakage current density of Al/SiON/Si(100) capacitor was about the order of 10$\^$-8/ A/cm$^2$ at the range of ${\pm}$ 2.5 MV/cm. The C-V characteristics of Al/LiNbO$_3$/SiON/Si(100) capacitor showed a hysteresis loop due to the ferroelectric nature of the LiNbO$_3$ thin films. Typical dielectric constant value of LiNbO$_3$ film of MFIS device was about 24. The memory window width was about 1.2V at the electric field of ${\pm}$300 kV/cm ranges.

• Current Photovoltaic Research
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• v.8 no.3
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• pp.94-101
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• 2020

This study was trying to focus on achieving high efficiency of multi junction solar cell with thin film silicon solar cells. The proposed thin film Si-Ge/c-Si tandem junction solar cell concept with a combination of low-cost thin-film silicon solar cell technology and high-efficiency c-Si cells in a monolithically stacked configuration. The tandem junction solar cells using amorphous silicon germanium (a-SiGe:H) as an absorption layer of upper sub-cell were simulated through ASA (Advanced Semiconductor Analysis) simulator for acquiring the optimum structure. Graded Ge composition - effect of E_g profiling and inserted buffer layer between absorption layer and doped layer showed the improved current density (J_sc) and conversion efficiency (η). 13.11% conversion efficiency of the tandem junction solar cell was observed, which is a result of showing the possibility of thin film Si-Ge/c-Si tandem junction solar cell.

• Journal of the Korean Ceramic Society
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• v.42 no.9 s.280
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• pp.624-630
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• 2005

To investigate the possibility of the $ZrO_2$ buffer layer as the insulator for the Metal-Ferroelectric-Insulator-semiconductor (MFIS) structure, $ZrO_2$ and $SrBi_2Ta_2O_9$ (SBT) thin films were deposited on the P-type Si(111) wafer by the R.F. magnetron-sputtering method. According to the process with and without the post-annealing of the $ZrO_2$ buffer layer and SBT thin film, the diffusion amount of Sr, Bi, Ta elements show slight difference through the Glow Discharge Spectrometer (GDS) analysis. From X-ray Photoelectron Spectroscopy (XPS) results, we could confirm that the post-annealing process affects the chemical binding condition of the interface between the $ZrO_2$ thin film and the Si substrate. Compared to the MFIS structure without the post-annealing of the $ZrO_2$ buffer layer, memory window value of MFlS structure with post-annealing of the $ZrO_2$ buffer layer were considerably improved. The window memory of the Pt/SBT (260 nm, $800^{\circ}C)/ZrO_2$ (20 nm) structure increases from 0.75 to 2.2 V under the applied voltage of 9 V after post-annealing.

• Proceedings of the KIEE Conference
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• 2004.11a
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• pp.183-186
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• 2004

The metal-ferroelectric-insulator-semiconductor(MFIS) capacitors were fabricated using a metalorganic decomposition (MOD)method. The $CeO_2$ thin films were deposited as a buffer layer on Si substrate and $Bi_{3.25}La_{0.75}Ti_3O_{12}$ (BLT) thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated by varying the $CeO_2$ layer thickness. The width of the memory window in the capacitance-voltage (C-V)curves for the MFIS structure decreased with increasing thickness of the $CeO_2$ layer. Auger electron spectroscopy (AES) and transmission electron microscopy (TEM) show no interdiffusion by using the $CeO_2$ film as buffer layer between the BLT film and Si substrate. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory field-effect-transistors (FETs) with large memory window.

• Proceedings of the Materials Research Society of Korea Conference
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• 2009.05a
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• pp.24.1-24.1
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• 2009

The zinc oxide (ZnO) material as the II-VI compound semiconductor is useful in various fields of device applications such as light-emitting diodes (LEDs), solar cells and gas sensors due to its wide direct band gap of 3.37eV and high exciton binding energy of 60meV at room temperature. In this study, the ZnO nanorods were deposited onto homogenous buffer layer/Si(100) substrates by a hydrothermal synthesis. The Effects of the buffer layer annealing and post annealing temperature on the structural and optical properties of ZnO nanorods grown by a hydrothermal synthesis were investigated. For the buffer layer annealing case, the annealed buffer layer surface became rougher with increasing of annealing temperature up to $750^{\circ}C$, while it was smoothed with more increasing of annealing temperature due to the evaporation of buffer layer. It was found that the roughest surface of buffer layer improved the structural and optical properties of ZnO nanorods. For the post annealing case, the hydrothermally grown ZnO nanorods were annealed with various temperatures ranging from 450 to $900^{\circ}C$. Similarly in the buffer layer annealing case, the post annealing enhanced the properties of ZnO nanorods with increasing of annealing temperature up to $750^{\circ}C$. However, it was degraded with further increasing of annealing temperature due to the violent movement of atoms and evaporation. Finally, the buffer layer annealing and post annealing treatment could efficiently improve the properties of hydrothermally grown ZnO nanorods. The morphology and structural properties of ZnO nanorods grown by the hydrothermal synthesis were measured by atomic force microscopy (AFM), field emission scanning electron microscopy (SEM), and x-ray diffraction (XRD). The optical properties were also analyzed by photoluminescence (PL) measurement.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.19 no.4
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• pp.159-164
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• 2009

We fabricated 40 nm-thick cobalt silicide ($CoSi_2$) as a buffer layer, on p-type Si(100) and Si(111) substrates to investigate the possibility of GaN epitaxial growth on $CoSi_2$/Si substrates. We deposited GaN using a HVPE (hydride vapor phase epitaxy) with two processes of process I ($850^{\circ}C$-12 minutes + $1080^{\circ}C$-30 minutes) and process II ($557^{\circ}C$-5 minutes + $900^{\circ}C$-5 minutes) on $CoSi_2$/Si substrates. An optical microscopy, FE-SEM, AFM, and HR-XRD (high resolution X-ray diffractometer) were employed to determine the GaN epitaxy. In case of process I, it showed no GaN epitaxial growth. However, in process II, it showed that GaN epitaxial growth occurred. Especially, in process II, GaN layer showed selfaligned substrate separation from silicon substrate. Through XRD ${\omega}$-scan of GaN <0002> direction, we confirmed that the combination of cobalt silicide and Si(100) as a buffer and HVPE at low temperature (process II) was helpful for GaN epitaxy growth.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.403-403
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• 2011

TCO/p/i/n 구조의 비정질 실리콘 박막 태양전지의 제작에 있어서 a-Si 혹은 넓은 밴드갭 물질인 SiOx, SiC 등은 window layer로 주로 사용 되어왔다. 그러나 ${\mu}c$-Si는 우수한 광학적, 전기적 특성에 불구하고 낮은 activation energy에 의한 p/i interface 에서의 band-off set에 의한 정공재결합에 의해 사용되어 지지 못했다. 이러한 재결합은 p/i interface상에 buffer layer를 삽입함으로써 개선되어 질 수 있다. 본 논문에서는 비정질 실리콘 보다 넓은 광학적 밴드갭을 가지는 a-SiOx 박막을 완충층으로 사용하여 p/i 계면에서의 재결합 감소에 대한 시뮬레이션을 수행하였다. a-SiOX 박막 내에 포함 된 산소의 양에 따라 밴드갭을 조절하여 1.8eV~2.0eV 사이의 완충층을 삽입하여 박막태양전지의 개방전압, 단락전류, 효율 등에 끼치는 영향을 ASA 시뮬레이션을 통하여 알아보았다.

• Journal of the Korean Ceramic Society
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• v.36 no.1
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• pp.55-60
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• 1999

${\beta}$-SiC thin film was deposited on a Si substrate without buffer layer using a single precursor of Hexamethyldisilane (Si2(CH3)6) by chemical vapor deposition method. HCI gas was introduced into hexamethyldisilane /H2 gas mixture, and the feeding schedule of HCI and precursor gases was modified in order to enhance the selectivity of SiC deposition between a Si substrate and a SiO2 mask. The effect of HCI gas on the surface roughness of the SiC film was investigated and typical electrical properties of the SiC film were also investigated by Hall measurement.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.305-309
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• 2002

We have successfully fabricated a Metal-Ferroelectric-Insulator-Semiconductor (MFIS) structure using Bi$\sub$4-x/La$\sub$x/Ti$_3$O$\sub$12/ (BLT) ferroelectric thin film and SiO$_2$/Nitride/SiO$_2$ (ONO) stacked buffer layers for single transistor type ferroelectric nonvolatile memory applications. BLT films were deposited on 15 nm-thick ONO buffer layer by sol-gel spin-coating. The dielectric constant and the leakage current density of prepared ONO film were measured to be 5.6 and 1.0 x 10$\^$-8/ A/$\textrm{cm}^2$ at 2MV/cm, respectively, It was interesting to note that the crystallographic orientations of BLT thin films were strongly effected by pre-bake temperatures. X-ray diffraction patterns showed that (117) crystallites were mainly detected in the BLT film if pre-baked below 400$^{\circ}C$. Whereas, for the films pre-baked above 500$^{\circ}C$, the crystallites with preferred c-axis orientation were mainly detected. From the C-V measurement of the MFIS capacitor with c-axis oriented BLT films, the memory window of 0.6 V was obtained at a voltage sweep of ${\pm}$8 V, which evidently reflects the ferroelectric memory effect of a BLT/ONO/Si structure.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.235-235
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• 2009

This paper describes the influence of a polycrystalline (poly) 3C-SiC buffer layer on the surface acoustic wave (SAW) properties of poly aluminum nitride (AlN) thin films by comparing the center frequency, insertion loss, the electromechanical coupling coefficient ($k^2$), andthetemperaturecoefficientoffrequency(TCF) of an IDT/AlN/3C-SiC structure with those of an IDT/AlN/Si structure, The poly-AlN thin films with an (0002)-preferred orientation were deposited on a silicon (Si) substrate using a pulsed reactive magnetron sputtering system. Results show that the insertion loss (21.92 dB) and TCF (-18 ppm/$^{\circ}C$) of the IDT/AlN/3C-SiC structure were improved by a closely matched coefficient of thermal expansion (CTE) and small lattice mismatch (1 %) between the AlN and 3C-SiC. However, a drawback is that the $k^2(0.79%)$ and SAW velocity(5020m/s) of the AlN/3C-SiC SAW device were reduced by appearing in some non-(0002)AlN planes such as the (10 $\bar{1}$ 2) and (10 $\bar{1}$ 3) AlN planes in the AlN/SiC film. Although disadvantages were shown to exist, the use of the AlN/3C-SiC structure for SAW applications at high temperatures is possible. The characteristics of the AlN thin films were also evaluated using FT-IR spectra, XRD, and AFM images.