• 센서학회지
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• 제22권2호
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• pp.130-135
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• 2013

This study proposed a noble process to fabricate TSV (Through Silicon Via) structure which has lower cost, shorter production time, and more simple fabrication process than plating method. In order to produce the via holes, the Si wafer was etched by a DRIE (Deep Reactive Ion Etching) process. The via hole was $100{\mu}m$ in diameter and $400{\mu}m$ in depth. A dielectric layer of $SiO_2$ was formed by thermal oxidation on the front side wafer and via hole side wall. An adhesion layer of Ti and a seed layer of Au were deposited. Soldering process was applied to fill the via holes with solder paste and metal powder. When the solder paste was used as via hole metal line, sintering state and electrical properties were excellent. However, electrical connection was poor due to occurrence of many voids. In the case of metal powder, voids were reduced but sintering state and electrical properties were bad. We tried the via hole filling process by using mixing solder paste and metal powder. As a consequence, it was confirmed that mixing rate of solder paste (4) : metal powder (3) was excellent electrical characteristics.

• 한국분말야금학회:학술대회논문집
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• 한국분말야금학회 2006년도 Extended Abstracts of 2006 POWDER METALLURGY World Congress Part 1
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• pp.75-76
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• 2006

New PM route via bulk mechanical alloying is developed to fabricate the solid solution semi-conductive materials with $Mg_2Si_{1-x}Ge_x$ and $Mg_2Si_{1-y}Sn_y$ for 0 < x, y < 1 and to investigate their thermoelectric materials. Since $Mg_2Si$ is n-type and both $Mg_2Ge$ and $Mg_2Sn$ are p-type, pn-transition takes place at the specified range of germanium content, x, and tin content, y. Through optimization of chemical composition, solid-solution type thermoelectric semi-conductive materials are designed both for n-and p-type materials.

• 마이크로전자및패키징학회지
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• 제25권4호
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• pp.101-104
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• 2018

An electric field was applied to a Mo conductive layer in the sandwiched structure of $glass/SiO_2/Mo/SiO_2/a-Si$ to induce Joule heating in order to generate the intense heat needed to carry out the crystallization of amorphous silicon. Polycrystalline silicon was produced via Joule heating through a solid state transformation. Blanket crystallization was accomplished within the range of millisecond, thus demonstrating the possibility of a new crystallization route for amorphous silicon films. The grain size of JIC poly-Si can be varied from few tens of nanometers to the one having the larger grain size exceeding that of excimer laser crystallized (ELC) poly-Si according to transmission electron microscopy. We report here the blanket crystallization of amorphous silicon films using the $2^{nd}$ generation glass substrate.

• 한국세라믹학회지
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• 제35권12호
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• pp.1336-1336
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• 1998

2단계 열탄소환원법으로 탄화규소 휘스커를 Ar과 H2분위기에서 기상-고상, 2단계, 기상-액상-고상 성장기구를 통해 각각 합성하였다. Ar분위기에서 탄화규소 휘스커는 다음과 같은 반응기구로 성장하였다. SiO2(S)+C(s)-SiO(v)+CO(v) SiO(v)3CO(v)=SiC(s)whisker+2CO2(v) 2C(s)+2CO2(v)=4CO(v) 이때 전체 반응속도는 세번째 반응에 참여하는 탄소에 의해 지배되었다. 따라서 이 반응이 휘스커 합성의 율속반응으로 판단되었다. 한편 H2 분위기에서 탄화규소 휘스커는 다음과 같은 반응기구로 성장하였다.SiO2(s)+C(s)=SiO(v)+CO(v) 2C(s)+4H2(v)=2CH4(v) SiO(v)+2CH4(v)=SiC(s)whisker+CO(v)+4H2(v) 이때 전체 반응속도는 SiO(v) 기체의발생 속도에 의해 지배되었다. 따라서 첫번째 반응이 휘스커 합성의 율속 반응인 것으로 판단되었다.

• KIEE International Transactions on Electrophysics and Applications
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• 제3C권2호
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• pp.55-58
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• 2003

This paper examines the electrical characteristic of single oxide layer due to various diffusion conditions, substrate orientations, substrate resistivity and gas atmosphere in a diffusion furnace. The oxide quality was examined through the capacitance-voltage characteristic due to the annealing time after oxidation process, and the capacitance-voltage characteristics of the single oxide layer by will be described via semiconductor device simulation.

• 전기학회논문지
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• 제60권11호
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• pp.2083-2087
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• 2011

The SiC-$ZrB_2$ composites were produced by subjecting a 40:60 vol.% mixture of zirconium diboride($ZrB_2$) powder and ${\beta}$-silicon carbide (SiC) matrix to spark plasma sintering(SPS). Sintering was carried out for 60sec at $1400^{\circ}C$ (designation as TP145 and TP146), $1500^{\circ}C$(designation as TP155 and TP156) and uniaxial pressure 50MPa, 60MP under argon atmosphere. The physical, electrical, and mechanical properties of the SiC-$ZrB_2$ composites were examined. The relative density of TP145, TP146, TP155 and TP156 were 94.75%, 94.13%, 97.88% and 95.80%, respectively. Reactions between ${\beeta}$-SiC and $ZrB_2$ were not observed via x-ray diffraction (hereafter, XRD) analysis. The flexural strength, 306.23MPa of TP156 was higher than that, 279.42MPa of TP146 at room temperature, but lower than that, 392.30MPa of TP155. The properties of a SiC-$ZrB_2$ composites through SPS under argon atmosphere were positive temperature coefficient resistance (hereafter, PTCR) in the range from $25^{\circ}C$ to $500^{\circ}C$. The electrical resistivities of TP145, TP146, TP155 and TP156 were $6.75{\times}10^{-4}$, $7.22{\times}10^{-4}$, $6.17{\times}10^{-4}$ and $6.71{\times}10^{-4}{\Omega}{\cdot}cm$ at $25^{\circ}C$, respectively. The densification of a SiC-$ZrB_2$ composite through hot pressing depend on the sintering temperature and pressure. However, it is convinced that the densification of a SiC-$ZrB_2$ composite do not depend on sintering pressure under SPS.

• 마이크로전자및패키징학회지
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• 제20권2호
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• pp.65-74
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• 2013

Through-Silicon Via (TSV) 기술은 3차원 적층 패키징를 위한 핵심 기술로서 큰 관심을 받고 있다. 그러나 TSV 기술은 아직 다양한 공정상의 문제와 신뢰성 문제를 해결해야 하는 난제가 남아 있다. 특히 구리 비아(via)와 실리콘 기판의 큰 열팽창계수의 차이로 인한 열응력은 계면 박리, 크랙 발생, 구리 protrusion 등 다양한 신뢰성 문제를 발생시킨다. 본 연구에서는 구리 TSV 구조의 열응력을 수치해석을 이용하여 분석하였으며, 3차원 TSV 비아와 실리콘 기판의 응력 및 변형을 해석하였다. 비아의 크기, 비아와 비아 사이의 간격 및 비아의 밀도가 TSV 구조의 응력에 미치는 영향을 분석하였으며, 또한 어닐링(annealing) 온도 및 비아의 크기가 구리 protrusion에 미치는 영향을 관찰하였다. 구리 TSV 구조의 신뢰성을 향상시키기 위해서는 적절한 비아와 비아 사이의 간격을 유지한 상태에서, 비아의 크기 및 비아의 밀도는 작아야 한다. 또한 구리 protrusion을 감소시키기 위해서는 비아의 크기 및 어닐링 공정과 같은 공정의 온도를 낮추어야 한다. 본 연구의 결과는 TSV 구조의 열응력과 관련된 신뢰성 이슈를 이해하고, TSV 구조의 설계 가이드라인을 제공하는데 도움을 줄 수 있을 것으로 판단된다.

• 한국표면공학회지
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• 제47권2호
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• pp.68-74
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• 2014

The seed step-coverage enhancement process (SSEP) using Pd/Cu/PVP colloids was investigated for the filling of through silicon via (TSV) without void. TEM analysis showed that the Pd/Cu nano-particles were well dispersed in aqueous solution with the average diameter of 6.18 nm. This Pd/Cu nano-particles were uniformly deposited on the substrate of Si/$SiO_2$/Ti wafer using electrophoresis with the high frequency Alternating Current (AC). After electroless Cu deposition on the substrate treated with Pd/Cu/PVP colloids, the adhesive property between deposited Cu layer and substrate was evaluated. The Cu deposit obtained by SSEP with Pd/Cu/PVP colloids showed superior adhesion property to that on Pd ion catalyst-treated substrate. Finally, by implementing the SSEP using Pd/Cu/PVP colloids, we achieved 700% improvement of step coverage of Cu seed layer compared to PVD process, resulting in void-free filling in high aspect ratio TSV.

• Bulletin of the Korean Chemical Society
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• 제34권12호
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• pp.3805-3810
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• 2013

The surface modification of silica particles (SPs) was systemically conducted by the treatment of 0.1-10 wt % phenylsilanetriol (PST) on the basis of SPs used through two step processes: 1) the PST coating of SPs via evaporation under reduced pressure and 2) their thermal condensation leading to Si-O-Si bond formation via heating at $130^{\circ}C$. The evaluation of the modified SPs was conducted by the simple floating test on water and the measurement of the contact angle (CA) of water droplet on the 2-dimensional layer of modified SPs on slide glass. When PST was used about 2 wt % or above on the basis of SPs (about average size: 50 nm) used, the modified SPs were fully floated on the water and all dispersed into upper organic solvent layer after a shaking with the mixture of the water and benzene, indicating that the modified SPs have hydrophobic properties. The modified SPs were characterized by $^{29}Si$ MAS NMR and physicochemical properties including SEM, TEM, BET, adsorption/desorption isotherms, etc. were measured and compared each other in details. This research demonstrates that the organosilanetriol is a good modifier applicable for the surface modification of inorganic oxide particles using a low amount of modifier on the basis of oxide particles used.

• Bulletin of the Korean Chemical Society
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• 제22권2호
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• pp.154-158
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• 2001

The steps for the generation of very thin GaN films on ultrathin AlN/6H-SiC surface by alternating a pulsative supply (APS) of trimethyl gallium and NH3 gases have been examined by ASED-MO calculations. We postulate that the gallium cul ster was formed with the evaporation of CH4 gases via the decomposition of trimethyl gallium (TMG), dimethyl gallium (DMG), and monomethyl galluim (MMG). During the injection of NH3 gas into the reactor, the atomic hydrogens were produced from the thermal decomposition of NH3 molecule. These hydrogen gases activated the Ga-C bond cleavage. An energetically stable GaN nucleation site was formed via nitrogen incorporation into the layer of gallium cluster. The nitrogen atoms produced from the thermal degradation of NH3 were expected to incorporate into the edge of the gallium cluster since the galliums bind weakly to each other (0.19 eV). The structure was stabilized by 2.08 eV, as an adsorbed N atom incorporated into a tetrahedral site of the Ga cluster. This suggests that the adhesion of the initial layer can be reinforced by the incorporation of nitrogen atom through the formation of large grain boundary GaN crystals at the early stage of GaN film growth.