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http://dx.doi.org/10.5695/JKISE.2014.47.2.068

A Study on the Seed Step-coverage Enhancement Process (SSEP) of High Aspect Ratio Through Silicon Via (TSV) Using Pd/Cu/PVP Colloids  

Lee, Dongryul (Surface Technology R&BD Group, Korea Institute of Industrial Technology)
Lee, Yugin (Surface Technology R&BD Group, Korea Institute of Industrial Technology)
Kim, Hyung-Jong (Surface Technology R&BD Group, Korea Institute of Industrial Technology)
Lee, Min Hyung (Surface Technology R&BD Group, Korea Institute of Industrial Technology)
Publication Information
Journal of the Korean institute of surface engineering / v.47, no.2, 2014 , pp. 68-74 More about this Journal
Abstract
The seed step-coverage enhancement process (SSEP) using Pd/Cu/PVP colloids was investigated for the filling of through silicon via (TSV) without void. TEM analysis showed that the Pd/Cu nano-particles were well dispersed in aqueous solution with the average diameter of 6.18 nm. This Pd/Cu nano-particles were uniformly deposited on the substrate of Si/$SiO_2$/Ti wafer using electrophoresis with the high frequency Alternating Current (AC). After electroless Cu deposition on the substrate treated with Pd/Cu/PVP colloids, the adhesive property between deposited Cu layer and substrate was evaluated. The Cu deposit obtained by SSEP with Pd/Cu/PVP colloids showed superior adhesion property to that on Pd ion catalyst-treated substrate. Finally, by implementing the SSEP using Pd/Cu/PVP colloids, we achieved 700% improvement of step coverage of Cu seed layer compared to PVD process, resulting in void-free filling in high aspect ratio TSV.
Keywords
Seed step-coverage enhancement process (SSEP); Pd/Cu/PVP colloids; Through silicon via (TSV); Electrophoresis;
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