• Title/Summary/Keyword: Short Channel Effect

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Potential Barrier Shift Caused by Channel Charge in Short Channel GaAs MESFET (Short Channel GaAs MESFET의 채널전하분포와 채널전하에 의한 전위장벽의 변화)

  • Sub, Won-Chang;Lee, Myung-Soo;Ryu, Se-Hwan;Han, Deuk-Young;Ahn, Hyung-Keun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.9
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    • pp.793-799
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    • 2006
  • In this paper, the gate leakage current is first calculated using the experimental method between gate and drain by opening source electrode. the gate to drain current has been obtained with ground source. The difference between two currents has been tested and proves that the electric field generated by channel charge effect against the image force lowering.

Degradation Characteristics of Mobility in Channel of P-MOSFET's by Hot Carriers (핫 캐리어에 의한 피-모스 트랜지스터의 채널에서 이동도의 열화 특성)

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    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.11 no.1
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    • pp.26-32
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    • 1998
  • We have studied how the characteristics degradation between effective mobility and field effect mobility of gate channel in p-MOSFET's affects the gate channel length being follow by increased stress time and increased drain-source voltage stress. The experimental results between effective and field-effect mobility were analyzed that the measurement data are identical at the point of minimum slope in threshold voltage, the other part is different, that is, the effective mobility it the faster than the field-effect mobility. Also, It was found that the effective and field-effect mobility. Also, It was found that the effective and field-effect mobility of p-MOSFET's with short channel are increased by decreased channel length, increased stress time and increased drain-source voltage stress.

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Organic field-effect transistors with step-edge structure

  • Kudo, Kazuhiro
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.91-93
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    • 2008
  • The organic field-effect transistors with step-edge structure were fabricated. Source and drain electrodes were obliquely deposited by vacuum evaporation. The step-edge of the gate electrode serve as a shadow mask, and the short channel is formed at the step-edge. The excellent device performances were obtained.

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Poly-gate Quantization Effect in Double-Gate MOSFET (폴리 게이트의 양자효과에 의한 Double-Gate MOSFET의 특성 변화 연구)

  • 박지선;이승준;신형순
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.8
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    • pp.17-24
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    • 2004
  • Quantum effects in the poly-gate are analyzed in two dimensions using the density-gradient method, and their impact on the short-channel effect of double-gate MOSFETs is investigated. The 2-D effects of quantum mechanical depletion at the gate to sidewall oxide is identified as the cause of large charge-dipole formation at the corner of the gate. The bias dependence of the charge dipole shows that the magnitude of the dipole peak-value increases in the subthreshold region and there is a large difference in carrier and potential distribution compared to the classical solution. Using evanescent-nude analysis, it is found that the quantum effect in the poly-gate substantially increases the short-channel effect and it is more significant than the quantum effect in the Si film. The penetration of potential contours into the poly-gate due to the dipole formation at the drain side of the gate corner is identified as the reason for the substantial increase in short-channel effects.

Optimizing Effective Channel Length to Minimize Short Channel Effects in Sub-50 nm Single/Double Gate SOI MOSFETs

  • Sharma, Sudhansh;Kumar, Pawan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.2
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    • pp.170-177
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    • 2008
  • In the present work a methodology to minimize short channel effects (SCEs) by modulating the effective channel length is proposed to design 25 nm single and double gate-source/drain underlap MOSFETs. The analysis is based on the evaluation of the ratio of effective channel length to natural/ characteristic length. Our results show that for this ratio to be greater than 2, steeper source/drain doping gradients along with wider source/drain roll-off widths will be required for both devices. In order to enhance short channel immunity, the ratio of source/drain roll-off width to lateral straggle should be greater than 2 for a wide range of source/drain doping gradients.

A Study on Threshold Voltage and I-V Characteristics by considering the Short-Channel Effect of SOI MOSFET (SOI MOSFET의 단채널 효과를 고려한 문턱전압과 I-V특성 연구)

  • 김현철;나준호;김철성
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.8
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    • pp.34-45
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    • 1994
  • We studied threshold voltages and I-V characteristics. considering short channel effect of the fully depleted thin film n-channel SOI MOSFET. We presented a charge sharing model when the back surface of short channel shows accumulation depletion and inversion state respectively. A degree of charge sharing can be compared according to each of back-surface conditions. Mobility is not assumed as constant and besides bulk mobility both the mobility defined by acoustic phonon scattering and the mobility by surface roughness scattering are taken into consideration. I-V characteristics is then implemented by the mobility including vertical and parallel electric field. kThe validity of the model is proved with the 2-dimensional device simulation (MEDICI) and experimental results. The threshold voltage and charge sharing region controlled by source or drain reduced with increasing back gate voltage. The mobility is dependent upon scattering effect and electric field. so it has a strong influence on I-V characteristics.

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Analytical Threshold Voltage Model of Ion-Implanted MOSFET (이온 주입된 Mosfet의 문턱 전압의 해석적 모델)

  • Lee, Hyo-Sik;Jin, Ju-Hyeon;Gyeong, Jong-Min
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.22 no.6
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    • pp.58-62
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    • 1985
  • Analytical threshold voltage model of small size ion-implanted MOSFET's is proposed. Yau's model which is only applicable to MOSFET's with constant doping concentration was modified to handle the MOSFET's with nonuniform channel doping concentration and bird's beak, whereby the short and narrow-channel effect was quantitively described. Threshold voltage model for short-channel MOSFET's was derived by approximating the SUPREM result of channel impurity profile to a 2-step profile, and the narrow width be-haviour was successfully described using thr'weighting factor'to accommodate the doping profile in the bird's beak region.

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An Analytical Model for Deriving The Threshold Voltage of A Short-channel Intrinsic-body SDG SOI MOSFET (Short-Channel Intrinsic-Body SDG SOI MOSFET의 문턱전압 도출을 위한 해석적 모델)

  • Jang, Eun-Sung;Oh, Young-Hae;Suh, Chung-Ha
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.11
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    • pp.1-7
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    • 2009
  • In this paper, a simple analytical model for deriving the threshold voltage of a short-channel intrinsic-body SDG SOI MOSFET is suggested. Using the iteration method, both Laplace equations in intrinsic silicon body and gate oxide are solved two-dimensionally. Obtained potential distributions in both regions are expressed in terms of fourth and fifth-order of the coordinate perpendicular to the silicon channel direction. Making use of them, the surface potential is obtained to derive the threshold voltage in a closed-form. Simulation results show the fairly accurate dependencies of the threshold voltage on the various device parameters and applied bias voltages.

Analysis of Drain Induced Barrier Lowering for Double Gate MOSFET According to Channel Doping Concentration (채널도핑강도에 대한 이중게이트 MOSFET의 DIBL분석)

  • Jung, Hak-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.3
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    • pp.579-584
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    • 2012
  • In this paper, drain induced barrier lowering(DIBL) has been analyzed as one of short channel effects occurred in double gate(DG) MOSFET. The DIBL is very important short channel effects as phenomenon that barrier height becomes lower since drain voltage influences on potential barrier of source in short channel. The analytical potential distribution of Poisson equation, validated in previous papers, has been used to analyze DIBL. Since Gaussian function been used as carrier distribution for solving Poisson's equation to obtain analytical solution of potential distribution, we expect our results using this model agree with experimental results. The change of DIBL has been investigated for device parameters such as channel thickness, oxide thickness and channel doping concentration.

Relation of Short Channel Effect and Scaling Theory for Double Gate MOSFET in Subthreshold Region (문턱전압이하 영역에서 이중게이트 MOSFET의 스켈링 이론과 단채널효과의 관계)

  • Jung, Hak-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.7
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    • pp.1463-1469
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    • 2012
  • This paper has presented the influence of scaling theory on short channel effects of double gate(DG) MOSFET in subthreshold region. In the case of conventional MOSFET, to preserve constantly output characteristics,current and switching frequency have been analyzed based on scaling theory. To analyze the results of application of scaling theory for short channel effects of DGMOSFET, the changes of threshold voltage, drain induced barrier height and subthreshold swing have been observed according to scaling factor. The analytical potential distribution of Poisson equation already verified has been used. As a result, it has been observed that threshold voltage among short channel effects is grealty changed according to scaling factor. The best scaling theory for DGMOSFET has been explained as using modified scaling theory, applying weighting factor reflected the influence of two gates when scaling theory has been applied for channel length.