• Title/Summary/Keyword: Semiconductor devices

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Fuzzy-based Field-programmable Gate Array Implementation of a Power Quality Enhancement Strategy for ac-ac Converters

  • Radhakrishnan, N.;Ramaswamy, M.
    • Journal of Electrical Engineering and Technology
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    • v.6 no.2
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    • pp.233-238
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    • 2011
  • In the present work, a new approach is proposed for via interconnects of semiconductor devices, where multi-wall carbon nanotubes (MWCNTs) are used instead of conventional metals. In order to implement a selective growth of carbon nanotubes (CNTs) for via interconnect, the buried catalyst method is selected which is the most compatible with semiconductor processes. The cobalt catalyst for CNT growth is pre-deposited before via hole patterning, and to achieve the via etch stop on the thin catalyst layer (ca. 3nm), a novel 2-step etch scheme is designed; the first step is a conventional oxide etch while the second step chemically etches the silicon nitride layer to lower the damage of the catalyst layer. The results show that the 2-step etch scheme is a feasible candidate for the realization of CNT interconnects in conventional semiconductor devices.

A New Zero Voltage Transition Bridgeless PFC with Reduced Conduction Losses

  • Mahdavi, Mohammad;Farzanehfard, Hosein
    • Journal of Power Electronics
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    • v.9 no.5
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    • pp.708-717
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    • 2009
  • In this paper a new zero voltage transition PWM bridgeless PFC is introduced. The auxiliary circuit provides soft switching condition for all semiconductor devices. Also, in the resonant path of the auxiliary circuit, only two semiconductor devices exist. Therefore the resonant conduction losses are low. Furthermore, the auxiliary circuit semiconductor elements consist of only one diode and one switch. The proposed auxiliary circuit is applied to a bridgeless PFC converter to further reduce conduction and switching losses. In this paper, the operating modes of this converter are explained and the resulting ideal and simulation waveforms are shown. The presented experimental results justify the theoretical analysis.

Metal-Oxide-Semiconductor Photoelectric Devices (Metal-Oxide-Semiconductor 광전소자)

  • Kang, Kilmo;Yun, Ju-Hyung;Park, Yun Chang;Kim, Joondong
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.27 no.5
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    • pp.276-281
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    • 2014
  • A high-responsive Schottky device has been achieved by forming a thin metal deposition on a Si substrate. Two-different metals of Ni and Ag were used as a Schottky metal contact with a thickness about 10 nm. The barrier height formation between metal and Si determines the rectifying current profiles. Ag-embedding Schottky device gave an extremely high response of 17,881 at a wavelength of 900 nm. An efficient design of Schottky device may applied for photoelectric devices, including photodetectors and solar cells.

A Calculation of C-V characteristics for HgCdTe Semiconductor material (HgCdTe 반도체 재료의 C-V 특성 계산)

  • Lee, S.D.;Kang, H.B.;Kim, B.H.;ADD, ATRC, D.H.Kim;Kim, J.M.
    • Proceedings of the KIEE Conference
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    • 1992.07b
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    • pp.813-815
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    • 1992
  • Accurate Capacitance-Voltage characteristics of Metal-Insulator-Semiconductor (MIS) devices in narrow band-gap semiconductors are presented. The unique band structure of narrow band-gap semiconductors is taken into account such as non-parabolicity and degeneracy. Compensated and partially ionized impurities either in the bulk or the space charge region are also considered. HgCdTe is a defect semiconductor, so this approach is very important for characterization and analysis of MIS devices.

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Optimization of Reverse Engineering Processes for Cu Interconnected Devices

  • Koh, Jin Won;Yang, Jun Mo;Lee, Hyung Gyoo;Park, Keun Hyung
    • Transactions on Electrical and Electronic Materials
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    • v.14 no.6
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    • pp.304-307
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    • 2013
  • Reverse engineering of semiconductor devices utilizes delayering processes, in order to identify how the interconnection lines are stacked over transistor gates. Cu metal has been used in recent fabrication technologies, and de-processes becomes more difficult with the shrinking device dimensions. In this article, reverse engineering technologies to reveal the Cu interconnection lines and Cu via-plugs embedded in dielectric layers are investigated. Stacked dielectric layers are removed by $CF_4$ plasma etching, then the exposed planar Cu metal lines and via-plugs are selectively delineated by wet chemical solution, instead of the commonly used plasma-based dry etch. As a result, we have been successful in extracting the layouts of multiple layers within a system IC, and this technique can be applicable to other logic IC, analog IC, and CMOS IC, etc.

A Study on the Effected Factor for Vibration Criteria of Sensitive Equipment (정밀장비의 진동허용규제치에 미치는 인자에 관한 연구)

  • 이홍기;장강석;김두훈;김사수
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 1998.04a
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    • pp.302-307
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    • 1998
  • In the production of semiconductor wafer, optical and electron microscopes, ion-beam, laser device must maintain their alignments within a sub-micrometer. This equipment requires a vibration free environment to provide its proper function. Especially, lithography and inspection devices, which have sub-nanometer class high accuracy and resolution, have come to necessity for producing more improved giga and tera class semiconductor wafers. This high technology equipments require very strict environmental vibration standard, vibration criteria, in proportion to the accuracy of the manufacturing, inspecting devices. The vibration criteria of high sensitive equipment should be represented in the form of exactness and accuracy, because this is used as basic data for the design of building structure and structural dynamics of equipment. The study on the evaluation of the factors affecting the permissible vibration criteria is required to design the efficient isolation system of the semiconductor manufacturing of equipment. This paper deals with the properties of the effected factor for vibration criteria of high sensitive equipment.

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The optical and electrical properties of IGZO thin film fabricated by RF magnetron sputtering according to RF power (RF magnetron sputtering법으로 형성된 IGZO박막의 RF power에 따른 광학적 및 전기적 특성)

  • Zhang, Ya Jun;Kim, Hong Bae
    • Journal of the Semiconductor & Display Technology
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    • v.12 no.1
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    • pp.41-45
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    • 2013
  • IGZO transparent conductive thin films were widely used as transparent electrode of optoelectronic devices. We have studied the optical and electrical properties of IGZO thin films. The IGZO thin films were deposited on the corning 1737 glass by RF magnetron sputtering method. The RF power in sputtering process was varied as 25, 50, 75and 100 W, respectively. All of the thin films transmittance in the visible range was above 85%. XRD analysis showed that amorphous structure of the thin films without any peak. The thin films were electrically characterized by high mobility above $13.4cm^2/V{\cdot}s$, $7.0{\times}10^{19}cm^{-3}$ high carrier concentration and $6{\times}10^{-3}{\Omega}-cm$ low resistivity. By the studies we found that IGZO transparent thin film can be used as transparent electrodes in electronic devices.

A Novel Data Driver for Passive Matrix Organic Light-emitting Devices with High Gray Scale Images utilizing a High Uniform Current

  • Shin, Hong-Jae;Kwack, Kae-Dal;Kim, Tae-Whan
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.1398-1400
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    • 2005
  • A novel data driver for passive matrix organic lightemitting devices (PM-OLEDs) with high gray scale images was designed. The proposed circuit consisted of a main current bias circuit as well as sample & hold circuits in each channel of the data driver to compensate a current offset. These results indicate that a data driver designed by using the current offset compensation technique holds promise for poten tial applications in PM-OLED displays with high gray scale images.

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Electronic and optical devices based on semiconductor nanowires (반도체 나노선 전자소자 및 광전소자응용)

  • Kil, Sang-Cheol;Sim, Sung-Kju;Kim, Sang-Sig
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.11a
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    • pp.260-263
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    • 2004
  • During the last few years, there have been many efforts on the fabrication of electronic and optical devices based on semiconductor nanowires. Room-temperature ultraviolet lasing in GaN nanowire, ultraviolet light sensing in ZnO nanowire, and dramatically improved hall mobility in Si nanowire have been demonstrated in this article. The studies on semiconductor nanowire based electronic and optical device is reviewed.

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Influences of Trap States at Metal/Semiconductor Interface on Metallic Source/Drain Schottky-Barrier MOSFET

  • Cho, Won-Ju
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.7 no.2
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    • pp.82-87
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    • 2007
  • The electrical properties of metallic junction diodes and metallic source/drain (S/D) Schottky barrier metal-oxide-semiconductor field-effect transistor (SB-MOSFET) were simulated. By using the abrupt metallic junction at the S/D region, the short-channel effects in nano-scaled MOSFET devices can be effectively suppressed. Particularly, the effects of trap states at the metal-silicide/silicon interface of S/D junction were simulated by taking into account the tail distributions and the Gaussian distributions at the silicon band edge and at the silicon midgap, respectively. As a result of device simulation, the reduction of interfacial trap states with Gaussian distribution is more important than that of interfacial trap states with tail distribution for improving the metallic junction diodes and SB-MOSFET. It is that a forming gas annealing after silicide formation significantly improved the electrical properties of metallic junction devices.