• 한국전기전자재료학회논문지
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• 제27권10호
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• pp.618-622
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• 2014

The temperature dependent characteristics on the properties of SiC Schottky Diode has been investigated. In this study, the temperature dependent current-voltage characteristics of the SiC Schottky diode were measured in the range of 300 ~ 500 K. Divided into pre- and post- irradiated device was measured. The barrier height after irradiation device at 500 K increased 0.15 eV compared to 300 K, the barrier height of pre- neutron irradiated Schottky diode increased 0.07 eV. The effective barrier height after irradiation increased from 0.89 eV to 1.05 eV. And ideality factor of neutron irradiated Schottky diode at 500 K decreased 0.428 compared to 300 K, the ideality factor of pre- neutron irradiated Schottky diode decreased 0.354. Also, a slight positive shift in threshold voltage from 0.53 to 0.68 V. we analyzed the effective barrier height and ideality factor of SiC Schottky diode as function of temperature.

• 전기전자학회논문지
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• 제19권1호
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• pp.94-100
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• 2015

본 논문에서는 U-MOSFET 내부의 기생 body 다이오드(PN diode)를 쇼트키 body 다이오드(Schottky body diode)로 대체한 50V급 전력 U-MOSFET을 제안하였다. 쇼트키 다이오드는 PN 다이오드와 비교 시, 역 회복 손실(reverse recovery loss)을 감소시킬 수 있는 장점을 가지고 있다. 따라서 전력 MOSFET의 기생 body 다이오드를 쇼트키 body 다이오드를 대신함으로써 역 회복 손실을 최소화 할 수 있다. 제안된 쇼트키 body 다이오드(Schottky body diode) U-MOSFET(SU-MOS)를 conventional U-MOSFET(CU-MOS)와 전기적 특성을 비교한 결과, 전달(transfer) 및 출력(output)특성, 항복(breakdown)전압 등 정적(static) 특성의 변화 없이 감소된 역 회복 손실을 얻을 수 있었다. 즉, 쇼트키 다이오드의 폭(width)이 $0.2{\mu}m$, 쇼트키 장벽 높이(Schottky barrier height)가 0.8eV일 때 첨두 역전류(peak reverse current)는 21.09%, 역 회복 시간(reverse recovery time)은 7.68% 감소하였고, 성능지수(figure of merit(FOM))는 35% 향상되었다. 제안된 소자의 특성은 Synopsys사의 Sentaurus TCAD를 사용하여 분석되었다.

• 대한전기학회논문지
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• 제41권5호
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• pp.573-576
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• 1992

Novel A1-Si Schottky diodes with self-aligned guard rings have been proposed and fabricated using RIE(Reactive Ion Etch). The breakdown voltage of the Schottky diode with the guard ring has been drastically increased to 200V or more in comparison with 46V for the metal overlap Schottky diode.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 C
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• pp.1618-1620
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• 1997

A GaAs schottky diode with taper field plate is proposed to increase breakdown voltage. Breakdown voltage is calculated by device simulator MEDICI. The GaAs schottky diode with taper gate which has $5.7^{\circ}$ taper angle have shown 45% increase in the breakdown voltage compared with conventional field plate GaAs schottky diode.

• 한국전기전자재료학회논문지
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• 제24권4호
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• pp.261-265
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• 2011

This paper describes the fabrication and characteristics of a Au/Ni/Ti/3C-SiC Schottky diode with field plate (FP) edge termination. The Schottky contacts were annealed for 30 min at temperatures ranging from 0 to $800^{\circ}C$. At annealing temperature of $600^{\circ}C$, it showed an inhomogeneous Schottky barrier and had the best electrical characteristics. However, the annealing of $800^{\circ}C$ replaced it with ohmic behaviors because of the formation of many different types of nickel silicides. The fabricated Schottky diode had a breakdown voltage of 200 V, Schottky barrier height of 1.19 eV and worked normally even at $200^{\circ}C$.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.192-195
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• 2001

In this report, we firstly have investigated the electrical characteristics of silicon carbide (SiC) schottky barrier diode and compared the characteristics to those of conventional Si diode through simulation and experiment. Secondly we have investigated the influence of two kinds of diodes to the power conversion circuit of the systems. From the investigation results it is verified that SiC schottky barrier diode is more superior to Si diode in thermal and reverse recovery, characteristics, which are the important factors in the size reduction and higher reliability of the systems. Finally though the experiment applied to PFC(Power Factor Correction) circuits, we precisely verified excellency to thermal characteristic of SiC schottky barrier diode any other diode.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.591-592
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• 2006

Schottky diodes for Radio-frequency identification (RFID) tag integration on chip were designed and fabricated using Samsung electronics System LSI standard $0.18{\mu}m$ CMOS process. Schottky diodes were designed as interdigitated fingers array by CMOS layout design rule. 64 types of Schottky diode were designed and fabricated with the variation of finger width, length and numbers with a $0.6{\mu}m$ guard ring enclosing n-well. Titanium was used as Schottky contact metal to lower the Schottky barrier height. Barrier height of the fabricated Schottky diode was 0.57eV. DC current - voltage measurements showed that the fabricated Schottky diode had a good rectifying properties with a breakdown voltage of -9.15 V and a threshold voltage of 0.25 V.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권5호
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• pp.664-674
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• 2016

The electrical properties of Ti/p-type InP Schottky diodes with and without polyaniline (PANI) interlayer was investigated using current-voltage (I-V) and capacitance-voltage (C-V) measurements. The barrier height of Ti/p-type InP Schottky diode with PANI interlayer was higher than that of the conventional Ti/p-type InP Schottky diode, implying that the organic interlayer influenced the space-charge region of the Ti/p-type InP Schottky junction. At higher voltages, the current transport was dominated by the trap free space-charge-limited current and trap-filled space-charge-limited current in Ti/p-type InP Schottky diode without and with PANI interlayer, respectively. The domination of trap filled space-charge-limited current in Ti/p-type InP Schottky diode with PANI interlayer could be associated with the traps originated from structural defects prevailing in organic PANI interlayer.

• 전자공학회논문지A
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• 제31A권1호
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• pp.71-76
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• 1994

Schottky diodes have been fabricated using the SDB wafer, and their characteristics have been investigated. For comparison, conventional planar and etched most structure were made on the same substrate. The ideality factor and barrier height of the fabricated devices are found to be 1.03 and 0.77eV, respectively. Breakdown volttge of the etched mesa Schottky diode has been increased to 180V. whereas it is 90V for the planar diode. Schottky diode with an etched mesa exhibits twice improvement in breaktown voltage.

• JSTS:Journal of Semiconductor Technology and Science
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• 제5권2호
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• pp.69-76
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• 2005

Interface-trap density, lifetime and Schottky barrier height of erbium-silicided Schottky diode are evaluated using equivalent circuit method. The extracted interface trap density, lifetime and Schottky barrier height for hole are determined as $1.5{\times}10^{13} traps/cm^2$, 3.75 ms and 0.76 eV, respectively. The interface traps are efficiently cured by $N_2$ annealing. Based on the diode characteristics, various sizes of erbium- silicided/platinum-silicided n/p-type Schottky barrier metal-oxide-semiconductor field effect transistors (SB-MOSFETs) are manufactured from 20 m to 35nm. The manufactured SB-MOSFETs show excellent drain induced barrier lowering (DIBL) characteristics due to the existence of Schottky barrier between source and channel. DIBL and subthreshold swing characteristics are compatible with the ultimate scaling limit of double gate MOSFETs which shows the possible application of SB-MOSFETs in nanoscale regime.