• Journal of the Korean Society for Heat Treatment
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• v.30 no.4
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• pp.151-155
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• 2017

The ZTO single layer and ZTO/Ag/ZTO tri-layer films were deposited on glass substrates by using the radio frequency (RF) and direct current (DC) magnetron sputtering and then rapid thermal annealed (RTA) in a low pressure condition for 10 minutes at 150 and $300^{\circ}C$, respectively. As deposited tri-layer films show the 81.7% of visible transmittance and $4.88{\times}10^{-5}{\Omega}cm$ of electrical resistivity, while the films annealed at $300^{\circ}C$ show the increased visible transmittance of 82.8%. The electrical resistivity also decreased as low as $3.64{\times}10^{-5}{\Omega}cm$. From the observed results, it is concluded that rapid thermal annealing (RTA) is an attractive post-deposition process to optimize the opto-elecrtical properties of ZTO/Ag/ZTO tri-layer films for the various display applications.

• Journal of the Korean Vacuum Society
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• v.12 no.3
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• pp.168-173
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• 2003

Recently, according to the rapid progress in Flat-panel-display industry, there has been a growing interest in the poly-Si process. Compared with a-Si, poly-Si offers significantly high carrier mobility, so it has many advantages to high response rate in Thin Film Transistors (TFT's). We have investigated a new process for the high temperature Solid Phase Crystallization (SPC) of a-Si films without any damages on glass substrates using thin film heater. because the thin film heater annealing method is a very rapid thermal process, it has very low thermal budget compared to the conventional furnace annealing. therefore it has some characteristics such as selective area crystallization, high temperature annealing using glass substrates. A 500 $\AA$-thick a-Si film was crystallized by the heat transferred from the resistively heated thin film heaters through $SiO_2$ intermediate layer. a 1000 $\AA$-thick $TiSi_2$ thin film confined to have 15 $\textrm{mm}^{-1}$ length and various line width from 200 to 400 $\mu\textrm{m}$ was used as the thin film heater. By this method, we successfully crystallized 500 $\AA$-thick a-Si thin films at a high temperature estimated above $850^{\circ}C$ in a few seconds without any thermal deformation of g1ass substrates. These surprising results were due to the very small thermal budget of the thin film heaters and rapid thermal behavior such as fast heating and cooling. Moreover, we investigated the time dependency of the SPC of a-Si films by observing the crystallization phenomena at every 20 seconds during annealing process. We suggests the individual managements of nucleation and grain growth steps of poly-Si in SPC of a-Si with the precise control of annealing temperature. In conclusion, we show the SPC of a-Si by the thin film heaters and many advantages of the thin film heater annealing over other processes

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.274-277
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• 2000

Thin Film Transistor(TFTs) were fabricated from poly-Si crystallized by a two-step annealing process on glass substrates. The combination of low-temperature(500$^{\circ}C$) Metal-Induced Lateral Crystallization(MILC) furnace annealing and high -temperature (700$^{\circ}C$) rapid thermal annealing leads to the improvement of the material quality The TFTs measured with this two-step annealing material exhibit better characteristics than those obtained by using conventional MILC furnace annealing.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.11
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• pp.734-739
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• 2017

We prepared $SnS_x$ thin films on both soda-lime glass (SLG) and molybdenum(Mo)/SLG substrates by a two-step process using a Sn precursor followed by sulfur reaction in rapid thermal annealing (RTA) at different sulfurization temperatures ($Ts=200^{\circ}C$, $230^{\circ}C$, $250^{\circ}C$, and $300^{\circ}C$) and annealing times ($t_s=10min$ and 30 min). The single SnS phase was dominant for $200^{\circ}C{\leq}T_s$<$250^{\circ}C$, while an additional phase of $SnS_2$ was appeared at $T_s{\geq}250^{\circ}C$ alongside SnS. The SnS grains in all the samples showed strong growth along the preferred [040] direction. The band-gap energy ($E_g$) of the films was estimated to be 1.24 eV.

• Journal of the Optical Society of Korea
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• v.20 no.1
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• pp.130-134
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• 2016

The influence of Au/Ni-based contact formed on a lightly-doped (7.3×1017cm−3, Zn-doped) InGaAsP layer for electrical compensation of surface plasmon polariton (SPP) propagation under various rapid thermal annealing (RTA) conditions has been studied. The active control of SPP propagation is realized by electrically pumping the InGaAsP multiple quantum wells (MQWs) beneath the metal planar waveguide. The metal planar film acts as the electric contact layer and SPP waveguide, simultaneously. The RTA process can lower the metal-semiconductor electric contact resistance. Nevertheless, it inevitably increases the contact interface morphological roughness, which is detrimental to SPP propagation. Based on this dilemma, in this work we focus on studying the influence of RTA conditions on electrical control of SPPs. The experimental results indicate that there is obvious degradation of electrical pumping compensation for SPP propagation loss in the devices annealed at 400℃ compared to those with no annealing treatment. With increasing annealing duration time, more significant degradation of the active performance is observed even under sufficient current injection. When the annealing temperature is set at 400℃ and the duration time approaches 60s, the SPP propagation is nearly no longer supported as the waveguide surface morphology is severely changed. It seems that eutectic mixture stemming from the RTA process significantly increases the metal film roughness and interferes with the SPP signal propagation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.2
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• pp.95-100
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• 2016

We fabricated a tin sulfide (SnS) layer with Sn/Mo/glass layers followed by a RTP (rapid thermal processing), and studied the film growth and structural characteristics as a function of annealing temperature and time. The elemental sulfur (S) was cracked thermally and applied to form SnS polycrystalline film out of the Sn percursor at pre-determined pressures in the RTP tube. The sulfurization was done at the temperature from $200^{\circ}C$ to $500^{\circ}C$ for a time period of 10 to 40 min. At ${\leq}300^{\circ}C$, 20 min., p-type SnS thin films was grown and showed the best composition of at.% of [S]/[Sn] $${\sim_=}$$ 1 and [111] preferred orientation as investigated from using XRD (X-ray diffraction) analysis and EDS (energy dispersive spectroscopy) and SEM (scanning electron microscopy), and optical absorption by a UV-VIS spectrometer. In this paper, we report the details of growth characteristics of single phase SnS thin film as a function of annealing temperature and time associated with the pressure and ambient gas in the RTP tube.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.7
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• pp.535-540
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• 1998

Thin films of PLZT were prepared on indium tin oxide(ITO) coated glass substrates by sol-gel process and annealed by rapid thermal annealing(RTA) at $750^{\circ}C$ for 5 minutes. The crystal structure of PLZT thin films were investigated for a different Zr mol% content. XRD results showed that the crystallographic structure was transitted from tetragonal to rhombohedral structure as Zr mol% increased. Raman spectroscopy results showed that the bands of spectra became broader as the amount of Zr mol% increased and two crystal phase coexisted at 2/55/45 PLZT film. Raman spectroscopy was useful for crystal structure analysis of PLZT thin films.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.10
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• pp.859-864
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• 2003

We prepared SOI(silicon-on-insulator) wafer pairs of Si II SiO$_2$/Si$_3$N$_4$ II Si using wafer direct bonding with an electric furnace annealing(EFA), a fast linear annealing(FLA), and a rapid thermal annealing(RTA), respectively, by varying the annealing temperatures at a given annealing process. We measured the bonding area and the bonding strength with processes. EFA and FLA showed almost identical bonding area and theoretical bonding strength at the elevated temperature. RTA was not bonded at all due to warpage, We report that FLA process was superior to other annealing processes in aspects of surface temperature, annealing time, and bonding strength.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.9
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• pp.1060-1067
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• 1988

In this paper, we have investigated the effects of rapid thermal process on the electrical and structural properties of silicon films. It was shown that required times and temperature for the successful activation of dopants (Boron, Phosphorus:5E15atoms/cm\ulcorner were above 1000\ulcorner, 10sec, respectively. The typical resistivities of films deposited below 600\ulcorner were in the range of 1.0 E-3ohm-cm which was 20-30% lower than that of initially polycrystalline silicon depositd above 600\ulcorner. After rapid thermal process at high temperature above 1000\ulcorner, the films did not reveal any change in resistivity due to the dopant segregation, and better electrical conductivity could be obtained by increasing the process time. The grain growth by RTA treatment was more salient in the case of the doped amorphous than that of initially polycrystalline. The surface of the films also preserved the higher structural perfection and surface smoothness.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.500-501
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• 2005

Aluminum doped zinc oxide films (ZnO:Al) were deposited on glass substrate by DC magnetron sputtering from a ZnO target mixed with 2 wt% $Al_2O_3$. The effects of substrate bias on the electrical properties and film structure were studied. Films deposited with positive bias have been annealed at $600^{\circ}C$ using rapid thermal anneal (RTA) process. The effects of RTA on the evolution of film microstructure are to be also studied using X-ray diffraction, transmission electron microscopy, and atomic force microscopy. Positive bias sputtering may induce lattice defects caused by electron bombardments during deposition. The as-deposited film microstructure evolves from the film with high defect density to more stable film condition. The electrical properties of the films after RTA process were also studied and the results were correlated with the evolution of film microstructures.