• Proceedings of the Korean Vacuum Society Conference
• /
• 2014.02a
• /
• pp.292-292
• /
• 2014

Wide band gap semiconductors, such as III-nitrides (GaN, AlN, InN, and their alloys), SiC, and diamond are expected to play an important role in the next-generation electronic devices. Specifically, GaN-based high electron mobility transistors (HEMTs) have been targeted for high power, high frequency, and high temperature operation electronic devices for mobile communication systems, radars, and power electronics because of their high critical breakdown fields, high saturation velocities, and high thermal conductivities. For the stable operation, high power, high frequency and high breakdown voltage and high current density, the fabrication methods have to be optimized with considerable attention. In this study, low ohmic contact resistance and smooth surface morphology to AlGaN/GaN on 2 inch c-plane sapphire substrate has been obtained with stepwise annealing at three different temperatures. The metallization was performed under deposition of a composite metal layer of Ti/Al/Ni/Au with thickness. After multi-layer metal stacking, rapid thermal annealing (RTA) process was applied with stepwise annealing temperature program profile. As results, we obtained a minimum specific contact resistance of $1.6{\times}10^{-7}{\Omega}cm2$.

• The Transactions of the Korean Institute of Electrical Engineers C
• /
• v.52 no.8
• /
• pp.325-329
• /
• 2003

Effects of thermal treatment on the structural properties of diamond-like carbon (DU) films were examined. The DLC films were deposited by using a modified filtered cathodic vacuum arc (FCVA) deposition system and by varying the negative substrate bias voltage, deposition time, and nitrogen flow rate. Thermal treatment on DLC films was performed using a rapid thermal annealing (RTA) process at $600^{\circ}C$ for 2min. Raman spectroscopy, x-ray photoemission spectroscopy (XPS), atomic force microscope (AFM), and surface profiler were used to characterize the I$_{D}$I$_{G}$ intensity ratio, sp$^3$ hybrid carbon fraction, internal stress, and surface roughness. It was found for all the deposited DLC films that the RTA-treatment results in the release of internal compressive stress, while at the same time it leds to the decrease of sp$^3$ fraction and the increase of I$_{D}$I$_{G}$ intensity ratio. It was also suggested that the thermal treatment effect on the structural property of DLC films strongly depends on the diamond-like nature (i.e., sp$^3$ fraction) of as-deposited film.ed film.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1998.06a
• /
• pp.235-238
• /
• 1998

Ferroelectric $LiNbO_3$ thin films were grown directly on Si(100) substrates by 13.55MHz RF magnetron sputtering system using a ceramic target ($Nb_2O_5/Li_2C0_3$ = 51.4/48.6). Because high temperature process have to avoided to prevent degradation of the interface (insulator/Si), $LiNbO_3$ thin films were deposited below $300^{\circ}C$. After as-deposited films were performed RTA treatments in an oxygen ambient at $600^{\circ}C$ for 60s, electrical measurements performed films before and after anneal treatment. In high field region, the leakage current density of the films after annealing was deceased about 4order and the resistivity of these was increased to about 5\times 10^{11} \Omega \cdot cm$ at 500kV/cm. In accumulation region of C-V curve, we calculated dielectric constant of thin film $LiNbO_3$ as 27.9 which is close to that of bulk value.

• Journal of Sensor Science and Technology
• /
• v.14 no.2
• /
• pp.131-135
• /
• 2005

This paper describes the ohmic contact formation of single crystalline 3C-SiC thin films heteroepitaxially grown on Si(001) wafers. In this work, a TiW (Titanium-tungsten) film as a contact matieral was deposited by RF magnetron sputter and annealed with the vacuum and RTA (rapid thermal anneal) process respectively. Contact resistivities between the TiW film and the n-type 3C-SiC substrate were measured by the C-TLM (circular transmission line model) method. The contact phases and interface the TiW/3C-SiC were evaulated with XRD (X-ray diffraction), SEM (scanning electron microscope) and AES (Auger electron spectroscopy) depth-profiles, respectively. The TiW film annealed at $1000^{\circ}C$ for 45 sec with the RTA play am important role in formation of ohmic contact with the 3C-SiC substrate and the contact resistance is less than $4.62{\times}10^{-4}{\Omega}{\cdot}cm^{2}$. Moreover, the inter-diffusion at TiW/3C-SiC interface was not generated during before and after annealing, and kept stable state. Therefore, the ohmic contact formation technology of single crystalline 3C-SiC using the TiW film is very suitable for high temperature MEMS applications.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.11 no.5
• /
• pp.358-364
• /
• 1998

Retrograde well is a new process for ULSI fabrication. High energy ion implantation has been used for retrograde well formation. In this paper the forming condition for retrograde well using high energy ion implantation is compared with that for conventional well. TW signals for retrograde p-,n-well($900^{\circ}C$),after annealing are similar trends to those of conventional ones($1150^{\circ}C$), however the signals for RTA have the highest value because of small thermal budget. Junction depths of retrograde well are varied from about 1.2 to $3.0\{mu}m$ as for conventional well. The peak concentrations of retrograde well, however, are about 10 times higher in values than those of conventional ones so that they can be used as any types of potential barriers or gettering sites. The critical dose for phosphorus implantation in our experiments is between $3\times10^{13} and 1\times10^{14}/cm^2$. Under the above critical dose, there are many secondary defects near projected range such as dislocation lines and dislocation loops.

• Korean Journal of Materials Research
• /
• v.12 no.11
• /
• pp.883-888
• /
• 2002

We investigated the void formation in composite-titanium silicide($TiSi_2$) process. We varied the process conditions of polycrystalline/amorphous silicon substrate, composite $TiSi_2$ deposition temperature, and silicidation annealing temperature. We report that the main reason for void formation is the mass transport flux discrepancy of amorphous silicon substrate and titanium in composite layer. Sheet resistance in composite $TiSi_2$ without patterns is mainly affected by silicidation rapid thermal annealing (RTA) temperature. In addition, sheet resistance does not depend on the void defect density. Sheet resistance with sub-0.5 $\mu\textrm{m}$ patterns increase abnormally above $850^{\circ}C$ due to agglomeration. Our results imply that $sub-750^{\circ}C$ annealing is appropriate for sub 0.5 $\mu\textrm{m}$ composite X$sub-750_2$ process.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
• /
• 1996.10a
• /
• pp.386-393
• /
• 1996

The paper describes how a Maximum Length Sequence(MLS) and correlation technique in the form of Hadamard transformation may be applied for the measurement of airborne sound reduction. It is shown that in most cases, the values obtained by the MLS technique will be equal to the expected values obtained by the classical method. However, due to the correlation process involved, the MLS method will be much less sensitive to disturbances from extraneous noise. The described method has been implemented in an RTA acoustic analyser.

• Korean Journal of Materials Research
• /
• v.24 no.9
• /
• pp.443-450
• /
• 2014

Amorphous (a-Si) films were epitaxially crystallized on a very thin large-grained poly-Si seed layer by a silicide-enhanced rapid thermal annealing (SERTA) process. The poly-Si seed layer contained a small amount of nickel silicide which can enhance crystallization of the upper layer of the a-Si film at lower temperature. A 5-nm thick poly-Si seed layer was then prepared by the crystallization of an a-Si film using the vapor-induced crystallization process in a $NiCl_2$ environment. After removing surface oxide on the seed layer, a 45-nm thick a-Si film was deposited on the poly-Si seed layer by hot-wire chemical vapor deposition at $200^{\circ}C$. The epitaxial crystallization of the top a-Si layer was performed by the rapid thermal annealing (RTA) process at $730^{\circ}C$ for 5 min in Ar as an ambient atmosphere. Considering the needle-like grains as well as the crystallization temperature of the top layer as produced by the SERTA process, it was thought that the top a-Si layer was epitaxially crystallized with the help of $NiSi_2$ precipitates that originated from the poly-Si seed layer. The crystallinity of the SERTA processed poly-Si thin films was better than the other crystallization process, due to the high-temperature RTA process. The Ni concentration in the poly-Si film fabricated by the SERTA process was reduced to $1{\times}10^{18}cm^{-3}$. The maximum field-effect mobility and substrate swing of the p-channel poly-Si thin-film transistors (TFTs) using the poly-Si film prepared by the SERTA process were $85cm^2/V{\cdot}s$ and 1.23 V/decade at $V_{ds}=-3V$, respectively. The off current was little increased under reverse bias from $1.0{\times}10^{-11}$ A. Our results showed that the SERTA process is a promising technology for high quality poly-Si film, which enables the fabrication of high mobility TFTs. In addition, it is expected that poly-Si TFTs with low leakage current can be fabricated with more precise experiments.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.6 no.1
• /
• pp.16-21
• /
• 2006

A simple doping method to fabricate a very thin channel body of the p-type FinFETs with a 20 nm gate length by solid-phase-diffusion (SPD) process was developed. Using the poly-boron-films (PBF) as a novel diffusion source of boron and the rapid thermal annealing (RTA), the p-type sourcedrain extensions of the FinFET devices with a threedimensional structure were doped. The junction properties of boron doped regions were investigated by using the $p^+-n$ junction diodes which showed excellent electrical characteristics. Single channel and multi-channel p-type FinFET devices with a gate length of 20-100 nm was fabricated by boron diffusion process using PBF and revealed superior device scalability.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.25 no.9
• /
• pp.1060-1067
• /
• 1988

In this paper, we have investigated the effects of rapid thermal process on the electrical and structural properties of silicon films. It was shown that required times and temperature for the successful activation of dopants (Boron, Phosphorus:5E15atoms/cm\ulcorner were above 1000\ulcorner, 10sec, respectively. The typical resistivities of films deposited below 600\ulcorner were in the range of 1.0 E-3ohm-cm which was 20-30% lower than that of initially polycrystalline silicon depositd above 600\ulcorner. After rapid thermal process at high temperature above 1000\ulcorner, the films did not reveal any change in resistivity due to the dopant segregation, and better electrical conductivity could be obtained by increasing the process time. The grain growth by RTA treatment was more salient in the case of the doped amorphous than that of initially polycrystalline. The surface of the films also preserved the higher structural perfection and surface smoothness.