• Journal of the Korea Society of Computer and Information
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• v.3 no.2
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• pp.77-84
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• 1998

The continuous time signal system by development of CMOS technology have been receiving consideration attention. In this paper, Low pass filter using CMOS floating resistor have been designed with cut off frequency for speech signal processing. Especially a new floating resistor consisting entirely of CMOS devices in saturation has been developed. Linearity within $\pm$0.04% is achieved through nonlineartiy via current mirrors over an applied range of $\pm$1V. The frequency response exceeds 10MHz, and the resistors are expected to be useful in implementing integrated circuit active RC filters. The low pass filter designed using this method has simpler structure than switched capacitor filter. So reduce the chip area. The characteristics of the designed low pass filter using this method are simulated by pspice program.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.1
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• pp.753-759
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• 2020

A modified Chebyshev lowpass filter function with progressively diminishing ripples in the passband is proposed and analyzed in the frequency domain. Owing to the diminishing ripples, the passband magnitude characteristic of the proposed Chebyshev function has improved compared to the classical Chebyshev function. In addition, the phase characteristics of the proposed Chebyshev function were improved considerably compared to that of the Chebyshev function, and the time delay of the proposed function was much simpler and flatter. In addition, the proposed Chebyshev filter was realizable by the passive doubly terminated ladder network delivering maximum power transfer for the order n, even or odd, thus making themselves amenable to low-sensitivity active RC or switched capacitor filters through the simulation techniques. To verify the proposed Chebyshev filter characteristics, a 6th order passive doubly terminated ladder lowpass filter was designed and analyzed using the MATLAB and SPICE program. Thus, the proposed Chebyshev function can remove the drawbacks of the classical Chebyshev function and could be applicable to the design of a filter with an improved filter size, phase, and time delay characteristics for various signal processing.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.20 no.10
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• pp.82-93
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• 2006

In this paper, filters are designed to reduce transients overvoltage in inverter fed high-voltage large-capacity induction motor drive system. Design issues for a LCR filter at the inverter output terminals to reduce the dv/dt of the inverter output pulse and a RC filter at the induction motor input terminals to match the characteristic impedance between cable and induction motor are examined in detail. These filters are modeled to be suitable to high-voltage large-capacity induction motor. The performance of the filter is evaluated through simulation using EMTP(ElectroMagnetic Transients Program). We presented filters that used high voltage large-capacity induction Motor on the basis of this. Effect of the filter is analyzed for variation of the cable length. Characteristics of filters are analyzed to reduce harmonic in voltage waveform of induction motor input terminal. The switching surge voltage became the major cause to occur the insulation failure by serious voltage stress in the stator winding of induction motor. Filter for to mitigate transients overvoltage presents a required component in drive system of high-voltage large-capacity induction motor. Also, proposed filters are proved through simulation using EMTP.

• Journal of IKEEE
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• v.3 no.1 s.4
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• pp.11-21
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• 1999

This paper has been proposed a structure composed of FIRs and IIR filters as digital interpolation filter to integrate the off-chip analog low-pass filter of audio DAC. The passband ripple (>$0.41{\times}fs$), passband attenuation(>at$0.41{\times}fs$) and stopband attenuation(<$0.59{\times}fs$) of the ${\Delta}{\Sigma}$ modulator output using the proposed digital interpolation filter had ${\pm}0.001[dB]$, -0.0025[dB] and -75[dB], respectively. Also the inband group delay was 30.07/fs[s] and the error of group delay was 0.1672%. Also, the attenuation of stopband has been increased -20[dB] approximately at 65[kHz], out-of-band. Therefore the RC products of analog low-pass filter on chip have been decreased compared with the conventional digital interpolation filter structure.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.3
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• pp.678-684
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• 2013

This paper describes a low-power baseband circuit for SAW-less LTE-Advanced transmitters. The proposed transmitter baseband circuit consists of a 2nd-order Tow-Thomas type active RC-LPF and a 1st-order passive RC LPF. It can provide a 7 multi-channel cut-off frequencies and wide gain control range of -41 dB ~ 0 dB with a 1-dB step. The proposed 2nd-order active RC-LPF adopts an op-amp in which three other sub-op amps are in parallel connected to reduce DC current for different cutoff frequency. In addition, each sub-op amp adopts both Miller and feed-forward phase compensation method to achieve an UGBW of more than 1-GHz with a small DC power consumption. The proposed baseband circuit is implemented in 65-nm CMOS technology, consuming DC power from 6.3 mW to 24.1 mW from a 1.2V supply voltage for each different cut-off frequency.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.11
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• pp.1053-1060
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• 2016

This paper proposes an adaptive equalizer with the digitally controlled active variable capacitor. An equalizing amplifier consists of a main amplifier and a source degeneration RC filter which is implemented using the digitally controlled active variable capacitor for area efficiency and linear loss compensation. The active capacitor changes its capacitance by the amplifier gain control, which is based on miller effect. In the simulated results, the proposed equalizer compensates the high frequency loss and extends the data eye width from 0.31 UI to 0.64 UI.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.11
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• pp.2009-2014
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• 2017

A novel structure of phase locked loop (PLL) with a time constant comparator and a current compensator has been proposed. The proposed PLL uses small capacitors which are impossible for stable operation in a conventional PLL. It is small enough to be integrated into a single chip. The time constant comparator detects the loop filter output voltage variations using signals which are passed through small and large RC time constants. The signal from the large RC time constant node is the average of the loop filter output voltage. The output voltage of another node is approximately equal to the present loop filter voltage. The output of the time constant comparator controls a current compensator and charge/discharge small size loop filter capacitors. It makes the proposed PLL operate stably. It has been simulated and proved by HSPICE in a CMOS $0.18{\mu}m$ 1.8V process.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2005.11a
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• pp.399-403
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• 2005

In this paper, we analyze on the effect of RC filter to mitigate transient overvoltage on the high voltage induction motor fed by H-bridge cascaded 7-level inverter. The switching surge voltage becomes the major cause to occur the insulation failure by serious voltage stress in the stator winding of high voltage induction motor. The effect of switching surge appears more serious in high voltage induction motor than low voltage induction motor. Consequently, we demonstrated that the RC filter connected to the motor terminals greatly reduces the transient voltage stress md ringing. The results of simulation show the suppression of transient overvoltage at the motor end of a long cable. using EMTP

• The Journal of the Acoustical Society of Korea
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• v.10 no.3
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• pp.5-12
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• 1991

In this paper, 10 city names of Korean were recognized. The name are articulated each 5 times by 10 male speakers. Filter bank output on total 500 words were extracted and they were used as feature parameters. Filter bank was constructed of 15 channels with 1/3 octave spacing from 200[Hz], using RC active circuit. Reference templates were created by clustering algorithm. DTW algorithm was used to compare similarity between reference templates and input words. Euclidean distance equation and Chebyshev distance equation were used to know the distinction between the recognition results obtained by the method of distance caculation, error rates are 16.4[%], 15.0[%], respectively.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.9
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• pp.1692-1701
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• 1994

Macromodeling technology is useful to simulate and analyze the performance of new elements and complicated circuits or systems without any changes in today's general simulator, PSPICE. In this paper, Phase Locked Loop(PLL) is designed using macromodeling technique. The PLL macromodel has two basic sub-macromodels of the phase detector and the voltage controlled oscillator(VCO). The PLL macromodel has two open terminals for inserting RC low pass filter. The PLL macromodel is simulated using simulation parameters of LM565CN manufactured in the National company. At a free-running frequency, 2500Hz, upper lock range and lower capture range was 437Hz, 563Hz, respectively. Also, experimental results and simulation results of LM565CN PLL show good agreement.