• Journal of The Korean Association of Information Education
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• v.19 no.2
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• pp.243-252
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• 2015

The software education to elementary students will be conducted from 2019. One of highlights of software education is a programming experience. It requires a higher level of programming education to students that are interested in programming. This problem can be solved by the club activities. But the materials for programming education for elementary students is not much. Therefore, we developed a programming material for club activities of the elementary school. We did not develop it as a programming manual. The students can understand a problem, can design through decomposition and abstraction processes, and can write a program when they are learning with this material. As a result, we expect that they can enhance their computational thinking abilities. We proved that our material is suitable for elementary students through a demonstration class. Therefore, we expect that our development methodologies for the material for programming education will contribute to develop a material for programming education.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.15-16
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• 2005

Chalcogenide phase change memory has high performance to be next generation memory, because it is a nonvolatile memory processing high programming speed, low programming voltage, high sensing margin, low consumption and long cycle duration. We have developed a new material of PRAM with $Ge_1Se_1Te_2$. This material has been propose to solve the high energy consumption and high programming current. We have investigated the phase transition behaviors in function of various process factor including contact size, cell size, and annealing time. As a result, we have observed that programming voltage and writing current of $Ge_1Se_1Te_2$ are more improved than $Ge_2Sb_2Te_5$ material.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.9
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• pp.771-774
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• 2003

In this paper, the programming characteristics of the multi-bit devices based on SONOS structure are investigated. Our devices have been fabricated by 0.35 $\mu\textrm{m}$ complementary metal-oxide-semiconductor (CMOS) process with LOCOS isolation. In order to achieve the multi-bit operation per cell, charges must be locally frapped in the nitride layer above the channel near the source-drain junction. Programming method is selected by Channel Hot Electron (CUE) injection which is available for localized trap in nitride film. To demonstrate CHE injection, substrate current (Isub) and one-shot programming curve are investigated. The multi-bit operation which stores two-bit per cell is investigated. Also, Hot Hole(HH) injection for fast erasing is used. The fabricated SONOS devices have ultra-thinner gate dielectrics and then have lower programming voltage, simpler process and better scalability compared to any other multi-bit storage Flash memory. Our programming characteristics are shown to be the most promising for the multi-bit flash memory.

• The Journal of Korean Association of Computer Education
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• v.14 no.1
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• pp.69-79
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• 2011

In this paper I present the framework for programming education relating to the programming course in university. First of all, I identify the literature of the psychological and educational study of programming in domestic and foreign country. Some outstanding papers in foreign country show that the mental model, programming knowledge and strategies are the important difference between novice and expert programmers. And various problems experienced by novice programmers are identified. I summarise this material and suggest some practical implications for programming teachers in their teaching activity. The framework for programming education presented by this work has three dimensions of program development process, programming learning factors and teaching and learning methods for programming to develope the novice's programming skill. It helps the programming teacher to design, implement and evaluate their programming course with the guideline of programming activities.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.54-57
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• 2002

In this study, a new programming method, to minimize the generation of Si-SiO$_2$ interface traps of scaled SONOS flash memory as a function of number of program/erase cycles has been proposed. In the proposed programming method, power supply voltage is applied to the gate, forward biased program voltage is applied to the source and the drain, while the substrate is left open, so that the program is achieved by Modified Fowler-Nordheim (MFN) tunneling of electron through the tunnel oxide over source and drain region. For the channel erase, erase voltage is applied to the gate, power supply voltage is applied to the substrate, and the source and drain are open. A single power supply operation of 3 V and a high endurance of 1${\times}$10$\^$6/ prograss/erase cycles can be realized by the proposed programming method. The asymmetric mode in which the program voltage is higher than the erase voltage, is more efficient than symmetric mode in order to minimize the degradation characteristics of scaled SONOS devices because electrical stress applied to the Si-SiO$_2$ interface is reduced by short programming time.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.6
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• pp.409-413
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• 2012

In this study, a substrate-bias assisted 2-step pulse programming method is proposed for realizing 4-bit/1-cell operation of the SONOS memory. The programming voltage and time are considerably reduced by this programming method than a gate-bias assisted 2-step pulse programming method and CHEI method. It is confirmed that the difference of 4-states in the threshold voltage is maintained to more than 0.5 V at least for 10-year for the multi-level characteristics.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.80-83
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• 2003

In this paper, the programming characteristics of the multi-bit devices based on SONOS structure are investigated. Our devices have been fabricated by $0.35\;{\mu}m$ complementary metal-oxide-semiconductor (CMOS) process with LOCOS isolation. In order to achieve the two-bits per cell operation, charges must be locally trapped in the nitride layer above the channel near the junction. Channel hot electron (CHE) injection for programming can operate in multi-bit using localized trap in nitride film. CHE injection in our devices is achieved with the single power supply of 5 V. To demonstrate CHE injection, substrate current (Isub) and one-shot programming curve were investigated. The multi-bit operation which stores two-bit per cell is investigated with a reverse read scheme. Also, hot hole injection for fast erasing is used. Due to the ultra-thin gate dielectrics, our results show many advantages which are simpler process, better scalability and lower programming voltage compared to any other two-bit storage flash memory. This fabricated structure and programming characteristics are shown to be the most promising for the multi-bit flash memory.

• The Journal of Korean Institute for Practical Engineering Education
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• v.3 no.2
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• pp.69-74
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• 2011

This paper proposes elementary Dolittle programming problems using the algorithmic thinking-based problem model with material factors in the elementary Dolittle programming. And this paper proves the validity of developed Dolittle programming problems in defining them as algorithmic thinking-based problems through experiments. The experimental results are analyzed in views of variety and effectiveness evaluation of answer algorithms and suitability of allocating degrees of difficulties to the developed Dolittle programming problems.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.03b
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• pp.3-3
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• 2010

The Characteristics of Digital Vterbi Decoder utilizing the analog parallel processing circuit technology is proposed. The Analog parallel structure of the viterbi decoder acted by a replacement of the conventional digital viterbi Decoder is progressing fastly. The proposed circuits design han, low distortion, high accuracy over the previous implementation and dynamic programming.

• The Journal of the Korea Contents Association
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• v.11 no.1
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• pp.458-468
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• 2011

Students meet with many problems during programming education in computer education. In part of computer education, computer programming education have been researched. And the research have said that computer programming education have helped to increasing of students' creativity during find answer of problem through flexible thought. Especially, elementary school students, who learn to programming language for the first time, feel difficulty, when they learn computer programming. But the use of EPL reduce difficulties. So Students can focus on the thinking. Therefore, in this paper, a draft was produced and applied to observe the creative elements increasing of elementary school students. Than modify and supplement the draft through improvements to a draft obtained by applying. Also, made the educational material that can be used directly in the field.