• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.2
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• pp.166-171
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• 2016

Nickel silicide is main issue in Polycrystalline silicon Thin Film Transistor (TFT) which is made by Metal Induced Lateral Crystallization (MILC) method. This Nickel silicide acts as a defect center, and this defect is one of the biggest reason of the high leakage current. In this research, we fabricated polycrystalline TFTs with novel method called Edge Cut (EC). With this new fabrication method, we assumed that nickel silicide at the edge of the channel region is reduced. Electrical properties are measured and trap state density also calculated using Levinson & Proano method.

• Knowledge Management Research
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• v.12 no.1
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• pp.39-52
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• 2011

Many LCD manufacturers continue to develop the technologies of LCD manufacturing processes for the reduction of production cost, power consumption and high-resolution. The LTPS (Low Temperature Polycrystalline Silicon) crystallization technology is important for rearranging the internal structure of liquid crystal grain by adding certain energy to amorphous silicon and turning it into poly-silicon in order to manufacture LCD with better performance. We consider 14 existing technologies of LTPS crystallization in the LCD manufacturing and present an intelligent analysis methodology using patent map and AHP (Analytic Hierarchy Process) analysis for determining an optimal LTPS crystallization technology. By using patent map analysis, we easily understand the development process and mega-trend of LTPS crystallization technologies and their relationship. By using AHP analysis, we evaluate 14 LTPS technologies. Through the use of proposed methodology, we determine the Continuous Wave Laser Lateral Crystallization technology as an optimal one.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.315-318
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• 2004

We developed a vapor induced crystallization (VIC) process for the first time to obtain high quality polycrystalline Si films by sublimating the mixture of $AlCl_3$ and $NiCl_2$. The VIC process enhanced the crystallization of amorphous silicon thin films. The LPCVD amorphous silicon thin films were completely crystallized after 5 hours at 480 $^{\circ}C$. It is known that needle-like grains with very small width grow in the Ni-metal induced lateral crystallization. In our new method, the width of grains is larger because the grain can also grow perpendicular to the needle growth direction. Also the interface between the merging grain boundaries was coherent. As the results, a polycrystalline film with superior microstructure has been obtained.

• Journal of Sensor Science and Technology
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• v.19 no.1
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• pp.31-35
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• 2010

High temperature micro pressure sensors were fabricated by using polycrystalline 3C-SiC piezoresistors grown on oxidized SOI substrates by APCVD. These have been made by bulk micromachining under $1{\times}1mm^2$ diaphragm and Si membrane thickness of $20{\mu}m$. The pressure sensitivity of implemented pressure sensors was 0.1 mV/$V{\cdot}bar$. The nonlinearity and the hysteresis of sensors were ${\pm}0.44%{\cdot}FS$ and $0.61%{\cdot}FS$. In the temperature range of $25^{\circ}C{\sim}400^{\circ}C$ with 5 bar FS, TCS (temperature coefficient of sensitivity), TCR (temperature coefficient of resistance), and TCGF (temperature coefficient of gauge factor) of the sensor were -1867 ppm/$^{\circ}C$, -792 ppm/$^{\circ}C$, and -1042 ppm/$^{\circ}C$, respectively.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.5
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• pp.364-369
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• 2011

Analyzing electrical degradation of polycrystalline silicon transistor to applicable at several environment is very important issue. In this research, after fabricating p channel poly crystalline silicon TFT (thin film transistor) electrical characteristics were compare and analized that changed by gate bias with first measurement. As a result on and off current was reduced by variation of gate bias and especially re duce ratio of off current was reduced by $7.1{\times}10^1$. On/off current ratio, threshold voltage and electron mobility increased. Also, when channel length gets shorter on/off current ratio was increased more and thresh old voltage increased less. It was cause due to electron trap and de-trap to gate silicon oxide by variation of gate bias.

• Journal of the Korean Vacuum Society
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• v.8 no.4A
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• pp.417-424
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• 1999

In order to investigate field emission mechanism of undoped polycrystalline diamond films, diamond films with different structural properties were deposited by varying positive substrate bias and/or $CH_4$ concentration. When increasing $CH_4$ concentration and positive substrate bias voltage, nondiamond carbon content in diamond films increased. Increase of nondiamond carbon content with increasing substrate voltage is ascribed to increase of substrate and excess generation of $CH_n$ radicals. Field emission properties of undoped polycrystalline diamond films ere significantly enhanced with increasing nondiamond carbon content. For diamond films with a small amount of nondiamond carbon, electrons are emitted through diamond surface while for the films with a large amount of nondiamond carbon, electron emission occurs through diamond bulk as well as surface. From this study, depending on nondiamond carbon content two field emission mechanisms were suggested.

• The Korean Journal of Ceramics
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• v.3 no.4
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• pp.249-252
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• 1997

Highly oriented ZnO thin films were fabricated by dip-coating technique using zinc acetate 2-methoxyethanol 2-aminoethanol solution as starting materials, and effects of substrates on the film's orientation were investigated. Product films were obtained by prefiring at 300, 400, 500 and 550℃ for 10 min, followed by final heat-treatment at the same temperatures as prefiring for 1h. c-axis oriented films on glass substrates were prepared by heat treatment of prefiring films at 300-550℃, while films on alumina showed polycrystalline structure. Films with c-axis orientation exhibited lower specific resistivities than those of polycrystalline films with partial crack and pore.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.1122-1125
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• 2006

The TFT performances were enhanced and stabilized by plasma oxidation of the polycrystalline Si surface prior to the plasma enhanced atomic layer deposition of $Al_2O_3$ gate dielectric film. We attribute the improvement to the formation of a high quality oxide interface layer between the gate dielectric film and the poly-Si film. The interface oxide has a predominant effect on the TFT's characteristics, and is regulated by the gap distance between the electrode and the polycrystalline Si surface.

• Journal of the Korean Ceramic Society
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• v.33 no.5
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• pp.583-589
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• 1996

In this study a new analytical model which can describe the relationship between the bridging stress and microstructure has beenproposed in order to investigate the microstructural effect on the R-curve behavior in polycrystalline aluminas since the R-curve can be derived via the bridging stress function. In the currently developed model function the distribution of grain size is considered as a microstructural factor in modeling of bridging stress function and thus the bridging stress function including three constants PM, n, and Cx, can be established analytically and quantitatively. The results indicate that the n value is closely related to the grain size distribution thereby providing a reliability of the current model for the bridging stress analysis. Thus this model which explains the correlation of the bridging stress distribution and microstructual parame-ters is useful for the systematic interpretation of microfracture mechanism including the R-curve behavior in polycrystalline aluminas.

• Journal of the Korean Ceramic Society
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• v.53 no.2
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• pp.150-161
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• 2016

The conventional brick-layer model is not satisfactory either in theory or in practice for the description of dispersive responses of polycrystalline solid electrolytes with current-constriction effects at the grain boundaries. Parallel networks of complex dielectric functions have been shown to successfully describe the AC responses of polycrystalline sodium conductors over a wide temperature and frequency range using only around ten model parameters of well-defined physical significance. The approach can be generally applied to many solid electrolyte systems. The present work illustrates the approach by simulation. Problems of bricklayer model analysis are demonstrated by fitting analysis of the simulated data under experimental conditions.