• 제목/요약/키워드: Oxide thin film transistors

검색결과 313건 처리시간 0.032초

Development of IGZO TFTs and Their Applications to Next-Generation Flat-Panel Displays

  • Hsieh, Hsing-Hung;Lu, Hsiung-Hsing;Ting, Hung-Che;Chuang, Ching-Sang;Chen, Chia-Yu;Lin, Yusin
    • Journal of Information Display
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    • 제11권4호
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    • pp.160-164
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    • 2010
  • Organic light-emitting devices (OLEDs) have shown superior characteristics and are expected to dominate the nextgeneration flat-panel displays. Active-matrix organic light-emitting diode (AMOLED) displays, however, have stringent demands on the performance of the backplane. In this paper, the development of thin-film transistors (TFTs) based on indium gallium zinc oxide (IGZO) on both Gen 1 and 6 glasses, and their decent characteristics, which meet the AMOLED requirements, are shown. Further, several display prototypes (e.g., 2.4" AMOLED, 2.4" transparent AMOLED, and 32" AMLCD) using IGZO TFTs are demonstrated to confirm that they can indeed be strong candidates for the next-generation TFT technology not only of AMOLED but also of AMLCD (active-matrix liquid crystal display).

실리콘산화아연주석 산화물 반도체의 후열처리 온도변화에 따른 트랜지스터의 전기적 특성 연구 (Electrical Performance of Amorphous SiZnSnO TFTs Depending on Annealing Temperature)

  • 이상렬
    • 한국전기전자재료학회논문지
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    • 제25권9호
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    • pp.677-680
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    • 2012
  • The dependency of annealing temperature on the electrical performances in amorphous silicon-zinc-tin-oxide thin film transistors (SZTO-TFT) has been investigated. The SZTO channel layers were prepared by using radio frequency (RF) magnetron sputtering method with different annealing treatment. The field effect mobility (${\mu}_{FE}$) increased and threshold voltage ($V_{th}$) shifted to negative direction with increasing annealing temperature. As a result, oxygen vacancies generated in SZTO channel layer with increasing annealing temperature resulted in negative shift in $V_{th}$ and increase in on-current.

용액공정을 이용한 ZnSnO 산화물 반도체 박막 트랜지스터에서 Mg 첨가에 따른 영향 (Electrical Properties of Mg Doped ZnSnO TFTs Fabricated by Solution-process)

  • 최준영;박기호;김상식;이상렬
    • 한국전기전자재료학회논문지
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    • 제24권9호
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    • pp.697-700
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    • 2011
  • Thin-film transistors(TFTs) with magnesium zinc tin oxide(MZTO) channel layer are fabricated by solution-process. The threshold voltage (Vth) shifted toward positive directly with increasing Mg contents in MZTO system. Because the Mg has a lower standard electrode potential (SEP) than Sn, Zn, thus degenerate the oxygen vacancy ($V_O$). As a result, the Mg act as carrier suppressor and oxygen binder in the MZTO as well as a Vth controller.

SPC 기판을 사용한 NVM 소자의 전기적 특성 (Electrical Characteristics of NVM Devices Using SPC Substrate)

  • 황인찬;이정인;이준신
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 추계학술대회 논문집
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    • pp.60-61
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    • 2007
  • In this paper, the p-channel poly Si thin-film transistors (Poly-Si TFT's) using formed by solid phase crystallization (SPC) on glass substrate were fabricated. And we propose an ONO(Oxide-Nitride-Oxide) multilayer as the gate insulator for poly-Si TFT's to indicate non-volatile memory (NVM) effect. Poly-Si TFT is investigated by measuring the electrical properties of poly-Si films, such as I-V characteristics, on/off current ratio. NVM characteristics is showed by measuring the threshold voltage change of TFT through I-V characteristics.

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저온 용액공정을 이용한 인듐갈륨 산화물(IGO) 박막트랜지스터 제조 및 특성 연구 (A Study on Indium Gallium Oxide Thin Film Transistors prepared by a Solution-based Deposition Method)

  • 배은진;이진영;한승열;;류시옥
    • Korean Chemical Engineering Research
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    • 제49권5호
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    • pp.600-604
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    • 2011
  • 본 연구에서는 박막 트랜지스터(TFTs)에 사용 가능한 Indium Gallium 산화물(IGO) 박막을 스핀코팅을 이용한 화학적 용액공정을 사용하여 $SiO_2$/Si 기판 위에 증착시켰다. 또한 IGO 박막을 증착한 후에 이루어지는 열처리 온도가 박막의 결정화에 미치는 영향과 이들의 전기적 특성이 조사되었다. 스핀코팅법에 의한 IGO 박막을 증착하기 위해 사용된 In과 Ga의 비율은 2:1로 고정하였으며, 박막의 열처리 온도는 $300{\sim}600^{\circ}C$의 범위에서 변화시켰다. 공기 중에서 $300^{\circ}C$$600^{\circ}C$에서 1시간 동안 열처리한 IGO 박막을 사용하여 제조한 박막 트랜지스터의 전류 이동도(field effect mobility)는 각각 0.34와 3.83 $cm^2/V{\cdot}s$로서 양호한 전자소자의 성능을 보였다. 또한 on/off 전류비(current ratio)는 $10^5$ 이상이었으며, IGO 박막의 평균 투과율은 98%이었다.

LPCVD 방법에 의한 저온 $SiO_2$ 박막의 증착방법과 DRAM 커패시터에서의 그 신뢰성 연구 (Novel Low-Temperature Deposition of the $SiO_2$ Thin Film using the LPCVD Method and Evaluation of Its Reliability in the DRAM Capacitors)

  • 안성준;박철근;안승준
    • 한국산학기술학회논문지
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    • 제7권3호
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    • pp.344-349
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    • 2006
  • [ $60{\sim}70nm$ ] 급의 design rule을 가진 고집적 반도체 소자를 제작하려면, 트랜지스터 형성 이후의 공정에서 thermal budget을 줄이기 위하여 공정의 온도를 낮추는 것이 중요하다. 본 연구에서는 고온의 습식 산화막을 대체할 수 있는 저온의 LPCVD (Low-Pressure Chemical Vapor Deposition) $SiO_2$(LTO : Low-Temperature Oxide) 박막 증착공정을 제시하였으며, ONO (Oxide/Nitride/Oxide) 구조의 커패시터를 형성하여 증착된 LTO 박막의 전기적인 신뢰성을 평가하였다. LTO 박막은 5 MV/cm 이하의 전기장 영역에서는 고온의 습식 산화막과 크게 차이가 없는 누설전류 특성을 보였으나, 더 높은 전기장의 영역에서는 훨씬 더 우수함을 보여주었다.

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Electrical properties of Organic TFT patterned by shadow-mask with all layer

  • 이주원;김재경;장진;주병권
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2006년도 하계종합학술대회
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    • pp.543-544
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    • 2006
  • Pentacene thin film transistors fabricated without photolithographic patterning were fabricated on the plastic substrates. Both the organic/inorganic thin films and metallic electrode were patterned by shifting the position of the shadow mask which accompanies the substrate throughout the deposition process. By using an optically transparent zirconium oxide ($ZrO_2$) as a gate insulator and octadecyltrimethoxysilane (OTMS) as an organic molecule for self-assembled monolayer (SAM) to increase the adhesion between the plastic substrate and gate insulator and the mobility with surface treatment, high-performance transistor with field effect mobility $.66\;cm^2$/V s and $I_{on}/I_{off}$>$10^5$ was formed on the plastic substrate. This technique will be applicable to all structure deposited at low temperature and suitable for an easy process for flexible display.

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LPCVD 질화막 만을 이용한 새로운 LOCOS 공정에 관한 연구 (Study of a New LOCOS Process Using Only Thin LPCVD Nitride)

  • 김지범;오기영;김달수;주승기;최민성
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1987년도 전기.전자공학 학술대회 논문집(I)
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    • pp.429-432
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    • 1987
  • A new LOCOS (Local Oxidation of Silicon) process using a thin nitride film directly deposited on the silicon substrate by LPCVD has been developed in order to reduce the bird's beak length. SEM studies showed that nitride thickness of 50nm can decrease the bird's beak length down to 0.2um with 450nm field oxide. No crystalline defects are observed around the bird's beak after the Wright etch. A 30% improvement in current density was obtained when this new method was applied to MOS transistors (W/L*2.9/20.4) compared to conventional LOCOS process (bird's beak length=0.7um). Other various electrical parameters improved by this new simple LOCOS process are reported in this paper.

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Zn-Sn-O 박막 트랜지스터의 전기적 특성에 대한 전자빔 조사의 영향 (Influence of Electron Beam Irradiation on the Electrical Properties of Zn-Sn-O Thin Film Transistor)

  • 조인환;조경일;최준혁;박해웅;김찬중;전병혁
    • 한국재료학회지
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    • 제27권4호
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    • pp.216-220
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    • 2017
  • The effect of electron beam (EB) irradiation on the electrical properties of Zn-Sn-O (ZTO) thin films fabricated using a sol-gel process was investigated. As the EB dose increased, the saturation mobility of ZTO thin film transistors (TFTs) was found to slightly decrease, and the subthreshold swing and on/off ratio degenerated. X-ray photoelectron spectroscopy analysis of the O 1s core level showed that the relative area of oxygen vacancies ($V_O$) increased from 10.35 to 12.56 % as the EB dose increased from 0 to $7.5{\times}10^{16}electrons/cm^2$. Also, spectroscopic ellipsometry analysis showed that the optical band gap varied from 3.53 to 3.96 eV with increasing EB dose. From the results of the electrical property and XPS analyses of the ZTO TFTs, it was found that the electrical characteristic of the ZTO thin films changed from semiconductor to conductor with increasing EB dose. It is thought that the electrical property change is due to the formation of defect sites like oxygen vacancies.

고유전 $(Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7)_{0.7}(MgO)_{0.3}$ 게이트 절연막을 이용한 저전압 구동 상온공정 ZnO 박막트랜지스터 (Low-Voltage, Room temperature Fabricated ZnO Thin Film Transistor using High-K $(Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7)_{0.7}(MgO)_{0.3}$ Gate Insulator)

  • 조남규;김동훈;김경선;김호기;김일두
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 추계학술대회 논문집
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    • pp.96-96
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    • 2007
  • Low voltage organic TFTs (OTFTs) and ZnO based TFTs (<5V), utilizing room temperature deposited $Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7$ (BZN) thin films were recently reported, pointing to high-k gate insulators as a promising route for realizing low voltage operating flexible electronics. $Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7$ (BZN) thin film is one of the most promising materials for gate insulator because of its large dielectric constant (~60) at room temperature. However their tendency to suffer from relatively high leakage current at low electric field (>0.3MV/cm) hinder the application of BZN thin films for gate insulator. In order to improve leakage current characteristics of BZN thin film, we mixed 30mol% MgO with 70mol% BZN and their dielectric and electric properties were characterized. We fabricated field-effect transistors with transparent oxide semiconductor ZnO serving as the electron channel and high-k $(Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7)_{0.7}(MgO)_{0.3}$ as the gate insulator. The devices exhibited low operation voltages (<4V) due to high capacitance of the $(Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7)_{0.7}(MgO)_{0.3}$ dielectric.

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