• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.1
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• pp.197-204
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• 2010

This paper proposes a new body-effect compensated switch configuration for low voltage and low distortion switched-capacitor (SC) applications. The proposed circuit allows rail-to-rail switching operation for low voltage SC circuits and has better total harmonic distortion than the conventional bootstrapped circuit by 19 dB. A 2-1 cascaded sigma-delta modulator is provided for performing the high-resolution analog-to-digital conversion on audio codec in a communication transceiver. An experimental prototype for a single-stage folded-cascode operational amplifier (opamp) and a 2-1 cascaded sigma-delta modulator has been implemented m a 0.25 micron double-poly, triple-metal standard CMOS process with 2.7 V of supply voltage. The 1% settling time of the opamp is measured to be 560 ns with load capacitance of 16 pF. The experimental testing of the sigma-delta modulator with bit-stream inspection and analog spectrum analyzing plot is performed. The die size is $1.9{\times}1.5\;mm$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.12
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• pp.46-53
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• 2003

This paper describes a new linear operational transconductance amplifier (OTA) and its application to the 9th-order Bessel filter. To improve the linearity of the OTA, we employ a mobility compensation technique. The combination of the triode and the subthreshold region transistors can compensate the mobility reduction effect and make the OTA with a good linearity. The proposed OTA shows $\pm$0.32% Gm variation over the input range of $\pm$0.8-V. The total harmonic distortion (THD) was lower than -60-㏈. The 9th-order Bessel filter has been designed using a 0.35-${\mu}{\textrm}{m}$ n-well CMOS process under 3.3-V supply voltage. It shows the cutoff frequency of 8-MHz and the power consumption of 65-mW.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.7
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• pp.665-670
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• 2016

In this paper, we suggest the design of OP-AMP using MOSFET in the operation of sub-threshold condition as a basic unit of an IoT. The sub-threshold operation of MOSFET is useful for an ultra low power consumption of sensor network system in the IoT, because it cause the supply voltage to be reduced. From the simulation result using 0.35 um CMOS process, the supply voltage, VDD can be reduced with 0.6 V, open-loop gain of 43 dB and the power consumption was evaluated with about $1.3{\mu}W$ and the active size for an integration was measured with $64{\mu}m{\times}105{\mu}m$. It is expected that the proposed circuit is applied to the low power sensor network for IoT.

• Journal of the Korean Society of Radiology
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• v.11 no.3
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• pp.101-108
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• 2017

DC/DC switching power converters are commonly used to generate a regulated DC output voltage with high efficiency. The advanced DC/DC converter uses a PWM-IC with OP-Amp. (Operational Amplifier) to control a MOSFET (metal-oxide semiconductor field effect transistor), which is a switching component, efficiently. In this paper, it is shown that the electrical characteristics of OP-Amp. are affected by radiations of ${\gamma}$ rays using $^{60}Co$ for TID (Total Ionizing Dose) testing and 5 heavy ions for SEL (Single Event Latch-up) testing. TID testing on OP-Amp. is accomplished up to the total dose of 30 krad, and the cross section($cm^2$) versus LET($MeV/mg/cm^2$) in the OP-Amp. operation is evaluated SEL testing after implementation of the controller board.

• Analytical Science and Technology
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• v.13 no.6
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• pp.775-780
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• 2000

The electrical conductivity of glass melter at high temperature has been measured. The conductivity is an important physical property for the research and the manufacturing process of glass. Because high temperature is an inconvenient situation to measure the conductivity of glass melter, we have made a platinum crucible and electrode and have measured the conductivity at high temperature. KCl solution, of which concentration is adjusted to the conductivity of glass melter, is used to get parameters of the conductivity cell. A measuring circuit is composed with an AC 1 kHz sine wave generator and an operational amplifier. The cell constants are determined from the measured voltages and the equivalent conductances of KCl solution. Various cells are tested to find a suitable shape for high temperature experiment. The results are compared by cell size, electrode depth, and cell configuration. The conductivity of the borosilicate melter is $0.053{\Omega}^{-1}cm^{-1}$ at $1,450^{\circ}C$.

• Journal of IKEEE
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• v.18 no.2
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• pp.192-197
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• 2014

In this paper, $3^{rd}$ SDM with FDPA(Feedback Delay Pass Addition) technique to improve the input range is proposed. Conventional architecture with $3^{rd}$ transfer function is just made as adding a digital delay path in $2^{nd}$ SDM architecture. But the input range is very small because feedback path into the first integrator is increased. But, proposed architecture change feedback path into the first integrator to the second integrator, so input range could be improved about 9dB. The $3^{rd}$ SC SDM with only one operational amplifier was implemented using double-sampling technique. Simulation results for the proposed SDM designed in $0.18{\mu}m$ CMOS technology with power supply voltage 1.8V, signal bandwidth 20KHz and audible sampling frequency 2.8224MHz show SNR(Signal to Noise Ratio) of 83.8dB, the power consumption of $700{\mu}W$ and Dynamic Range of 82.8dB.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.1
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• pp.44-54
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• 2001

In this paper, a novel test method is proposed to detect the hard and soft fault in analog circuits. The proposed test method makes use of the offset voltage, which is one of the op-amps characteristics. During the test mode, CUT is modified to unit gain op-amps with feedback loop. When the input of the op-amp is grounded, a good circuit has a small offset voltage, but a faulty circuit has a large offset voltage. Faults in the op-amp which cause the offset voltage exceeding predefined range of tolerance can be detected. In the proposed method, no test vector is required to be applied. Therefore the test vector generation problem is eliminated and the test time and cost is reduced. In this note, the validity of the proposed test method has been verified through the example of the dual slope A/D converter. The HSPICE simulations results affirm that the presented method assures a high fault coverage.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.7 s.361
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• pp.37-44
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• 2007

A low-voltage high-linear bipolar OTA and its application to IF bandpass filter for GSM cellular telephone are presented. The OTA consists of a low-voltage linear transconductor, a translinear current gain cell, and three current mirrors. The bandpass filter is composed of two cascaded identical second-order bandpass filters, which consist of a resistor, a capacitor, and a grounded simulated inductor realized with two OTA's and a grounded capacitor. SPICE simulations using an 8 GHz bipolar transistor-array parameter show that the OTA with a transconductance of 1 mS exhibits a linearity error of less than ${\pm}2%$ over an input voltage range of ${\pm}0.65\;V$ at supply voltages of ${\pm}2.0\;V$. Temperature coefficient of the transconductance is less than $-90ppm/^{\circ}C$. The bandpass filter has a center frequency of 85 MHz and Q-factor of 80. Temperature coefficient of the center frequency is less than $-182ppm/^{\circ}C$. The power dissipation of the filter is 128 mW.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.396-397
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• 2011

This paper has proposed a multi-channel low pass filter (LPF) for LTE-Advanced systems. The proposed LPF is an active-RC 5th chebyshev topology with three cut-off frequencies of 5 MHz, 10 MHz, and 40 MHz. A 3-bit tuning circuit has been adopted to prevent variations of each cut-off frequency from process, voltage, and temperature (PVT). To achieve a high cut-off frequency of 40 MHz, an operational amplifier used in the proposed filter has employed a PMOS cross-connection load with a negative impedance. A proposed filter has been implemented in a $0.13-{\mu}m$ CMOS technology and consumes 20.2 mW with a 1.2V supply voltage.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.2
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• pp.322-329
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• 2007

A single pixel photon counting type image sensor which is applicable for medical diagnosis with digitally obtained image and industrial purpose has been designed with $0.18{\mu}m$ triple-well CMOS process. The designed single pixel for readout chip is able to be operated by single supply voltage to simplify digital X-ray image sensor module and a preamplifier which is consist of folded cascode CMOS operational amplifier has been designed to enlarge signal voltage(${\Delta}Vs$), the output voltage of preamplifier. And an externally tunable threshold voltage generator circuit which generates threshold voltage in the readout chip has been newly proposed against the conventional external threshold voltage supply. In addition, A dark current compensation circuit for reducing dark current noise from photo diode is proposed and 15bit LFSR(Linear Feedback Shift Resister) Counter which is able to have high counting frequency and small layout area is designed.