• JSTS:Journal of Semiconductor Technology and Science
• /
• 제2권3호
• /
• pp.170-172
• /
• 2002

The epilayer of vertically stacked, self-assembled InAs Quantum Dots (QDs)was grown by MBE with solid sources in non-cracking K-cells, and the sample was fabricated to a FET structure using a conventional technology. The device characteristic and performance were studied. At 77K and room temperature, the threshold voltage shift values are 0.75V and 0.35 V, which are caused by the trapping and detrapping of electrons in the quantum dots. Discharging and charging curves form the part of a hysteresis loop to exhibit memory function. The electrical injection of confined electrons in QDs products the threshold voltage shift and memory function with the persistent electron trapping, which shows the potential use for a room temperature application.

• 반도체디스플레이기술학회지
• /
• 제23권1호
• /
• pp.65-70
• /
• 2024

Direct cache-to-cache transfer has been studied to reduce the latency and bandwidth consumption related to the shared data in multiprocessor system. Even though these studies lead to meaningful results, they assume that caches consist of SRAM. For example, if the system employs the non-volatile memory, the one of the most important parts to consider is to decrease the number of write operations. This paper proposes a hybrid write avoidance cache coherence protocol that considers the hybrid cache architecture. A new state is added to finely control what is stored in the non-volatile memory area, and experimental results showed that the number of writes was reduced by about 36% compared to the existing schemes.

• 반도체디스플레이기술학회지
• /
• 제11권2호
• /
• pp.85-91
• /
• 2012

In this paper, the large data processing and suitable FAT32 file system for industrial system using a PLC and CF memory was implemented. Most of PLC can't save the large data in user data memory. So it's required to the external devices of CF memory or NAND flash memory. The CF memory is used in order to save the large data of PLC system. The file system using the CF memory is NTFS, FAT, and FAT32 system to configure in various ways. Typically, the file system which is widely used in industrial data storage has been implemented as modified FAT32. The conventional FAT 32 file system was not possible for multiple writing and high speed data accessing. The proposed file system was implemented by the large data processing module can be handled that the files are copied at the 40 bytes for 1msec speed logging and creating 8 files at the same time. In a sudden power failure, high reliability was obtained that the problem was solved using a power fail monitor and the non-volatile random-access memory (NVSRAM). The implemented large data processing system was applied the modified file system as FAT32 and the good performance and high reliability was showed.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
• /
• pp.427-427
• /
• 2012

Ferroelectric-gate field effect transistor based memory using a nanowire as a conducting channel offers exceptional advantages over conventional memory devices, like small cell size, low-voltage operation, low power consumption, fast programming/erase speed and non-volatility. We successfully fabricated ferroelectric nonvolatile memory devices using both n-type and p-type Si nanowires coated with organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] via a low temperature fabrication process. The devices performance was carefully characterized in terms of their electrical transport, retention time and endurance test. Our p-type Si NW ferroelectric memory devices exhibit excellent memory characteristics with a large modulation in channel conductance between ON and OFF states exceeding $10^5$; long retention time of over $5{\times}10^4$ sec and high endurance of over 105 programming cycles while maintaining ON/OFF ratio higher $10^3$. This result offers a viable way to fabricate a high performance high-density nonvolatile memory device using a low temperature fabrication processing technique, which makes it suitable for flexible electronics.

• 전자공학회논문지CI
• /
• 제38권1호
• /
• pp.26-45
• /
• 2001

플래쉬 메모리는 데이터의 저장과 변경이 가능하고 전원이 차단되어도 저장된 데이터를 보존할 수 있는 RAM과 ROM의 장점을 모두 가지고 있는 메모리로서, 고성능의 전기 특성을 가지고 있어 이동 환경에서의 저장매체로 매우 접합하다. 향후 많은 정보단말기에 사용하게 될 플래쉬 메모리 및 스마트미디어 카드에 파일을 저장, 삭제, 재생하는 효과적인 알고리즘이 필요하다. 플래쉬 메모리를 일정한 크기의 세그먼트로 할당하고, 파일을 여러 개의 세그먼트로 분산시켜 관리한다. 본 논문에서는 특정 파일이 저장되어 있는 위치를 저장하는 테이블 및 보조 테이블을 이용하여 효과적인 파일 관리 알고리즘을 제시한다. 기존의 알고리즘은 비교적 작은 용량의 플래쉬 메모리를 관리하고 비교적 파일을 빈번한 횟수의 고속 저장, 삭제 등의 작동이 요구되는 응용에는 적합지 않는다. 본 논문에서 제안된 알고리즘은 몇 개의 플래쉬 메모리 칩 및 스마트미디어 카드로 구성된 비교적 큰 용량의 메모리 관리에 적합하다.

• 반도체디스플레이기술학회지
• /
• 제22권2호
• /
• pp.6-10
• /
• 2023

High-potential data can be predicted and stored in the cache to prevent cache misses, thus reducing the processor's request and wait times. As a result, the processor can work non-stop, hiding memory latency. By utilizing the temporal/spatial locality of memory access, the prefetcher introduced to improve the performance of these computers predicts the following memory address will be accessed. We propose a prefetcher that applies the GRU model, which is advantageous for handling time series data. Display the currently accessed address in binary and use it as training data to train the Gated Recurrent Unit model based on the difference (delta) between consecutive memory accesses. Finally, using a GRU model with learned memory access patterns, the proposed data prefetcher predicts the memory address to be accessed next. We have compared the model with the multi-layer perceptron, but our prefetcher showed better results than the Multi-Layer Perceptron.

• International Journal of Internet, Broadcasting and Communication
• /
• 제12권3호
• /
• pp.220-225
• /
• 2020

This paper investigates the non-intrusive speech intelligibility estimation method in noise environments when the bottleneck feature of autoencoder is used as an input to a neural network. The bottleneck feature-based method has the problem of severe performance degradation when the noise environment is changed. In order to overcome this problem, we propose a novel non-intrusive speech intelligibility estimation method that adds the noise environment information along with bottleneck feature to the input of long short-term memory (LSTM) neural network whose output is a short-time objective intelligence (STOI) score that is a standard tool for measuring intrusive speech intelligibility with reference speech signals. From the experiments in various noise environments, the proposed method showed improved performance when the noise environment is same. In particular, the performance was significant improved compared to that of the conventional methods in different environments. Therefore, we can conclude that the method proposed in this paper can be successfully used for estimating non-intrusive speech intelligibility in various noise environments.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제17권3호
• /
• pp.363-369
• /
• 2017

Phase-change random access memory (PRAM) has been emerged as a potential memory due to its excellent scalability, non-volatility, and random accessibility. But, as the cell current is reducing due to cell size scaling, the read-sensing window margin is also decreasing due to increased variation of cell performance distribution, resulting in a substantial loss of yield. To cope with this problem, a novel adaptive read-sensing reference current generation scheme is proposed, whose trimming range and resolution are adaptively controlled depending on process conditions. Performance evaluation in a 58-nm CMOS process indicated that the proposed read-sensing reference current scheme allowed the integral nonlinearity (INL) to be improved from 10.3 LSB to 2.14 LSB (79% reduction), and the differential nonlinearity (DNL) from 2.29 LSB to 0.94 LSB (59% reduction).

• Transactions on Electrical and Electronic Materials
• /
• 제12권1호
• /
• pp.16-19
• /
• 2011

The oxide-nitride-oxide (ONO) deposition process was added to the beginning of a 0.25 ${\mu}m$ embedded polysiliconoxide-nitride-oxide-silicon (SONOS) process before all of the logic well implantation processes in order to maintain the characteristics of basic CMOS(complementary metal-oxide semiconductor) logic technology. The system subsequently suffered severe ONO rupture failure. The damage was caused by the ONO implantation and was responsible for the ONO rupture failure in the embedded SONOS process. Furthermore, based on the experimental results as well as an implanted ion's energy loss model, processes primarily producing permanent displacement damages responsible for the ONO rupture failure were investigated for the embedded SONOS process.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제8권1호
• /
• pp.66-79
• /
• 2008

Several oxides have recently been reported to have resistance-switching characteristics for nonvolatile memory (NVM) applications. Both binary and ternary oxides demonstrated great potential as resistive-switching memory elements. However, the switching mechanisms have not yet been clearly understood, and the uniformity and reproducibility of devices have not been sufficient for gigabit-NVM applications. The primary requirements for oxides in memory applications are scalability, fast switching speed, good memory retention, a reasonable resistive window, and constant working voltage. In this paper, we discuss several materials that are resistive-switching elements and also focus on their switching mechanisms. We evaluated non-stoichiometric polycrystalline oxides ($Nb_2O_5$, and $ZrO_x$) and subsequently the resistive switching of $Cu_xO$ and heavily Cu-doped $MoO_x$ film for their compatibility with modem transistor-process cycles. Single-crystalline Nb-doped $SrTiO_3$ (NbSTO) was also investigated, and we found a Pt/single-crystal NbSTO Schottky junction had excellent memory characteristics. Epitaxial NbSTO film was grown on an Si substrate using conducting TiN as a buffer layer to introduce single-crystal NbSTO into the CMOS process and preserve its excellent electrical characteristics.