• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.16-17
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• 2006

In this paper, Ni-V alloy was studied with different structures and thickness. In case of Ni-V and Ni-V/Co/TiN, low resistive Ni silicide was formed after one step RTP (Rapid Thermal Process) with temperature range from $400^{\circ}C$ to $600^{\circ}C$ for 30sec in vacuum. After furnace annealing with temperatures range from $550^{\circ}C$ to $650^{\circ}C$ for 30min in nitrogen ambient, Ni-V single structure shows the best thermal stability compare with the other ones. To enhance the thermal stability up to 650oC and find the optimal thickness of Ni silicide, different thickness of Ni-V was studied in this work. Stable sheet resistance was obtained through Ni-V single structure with optimal Ni-V thickness.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.3
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• pp.615-620
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• 2008

We fabriacted thermal evaporated $10nm-Ni_{1-x}Co_x$(x=0.2, 0.6, and 0.7) films on 70 nm-thick polysilicon substrate with $0.5{\mu}m$ line width. NiCo composite silicide layers were formed by rapid thermal annealing (RTA) at the temperatures of $700^{\circ}C$ and $1000^{\circ}C$. Then, we checked the microstructure evaluation of silicide patterns. A FIB (focused ion beam) was used to micro-mill the interconnect patterns with low energy condition (30kV-10pA-2 sec). We investigated the possibility of selective removal of silicide layers. It was possible to remove low resistance silicide layer selectively with the given FIB condition for our proposed NiCo composite silicides. However, the silicides formed from $Ni_{40}Co_{60}$ and $Ni_{30}Co_{70}$ composition showed void defects in interconnect patterns. Those void defects hinder the selective milling for the NiCo composite silicides.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.1
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• pp.18-22
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• 2008

In this paper, the Ni-Co alloy was used for thermal stability estimation comparison with Ni structure. The proposed Ni/Ni-Co structure exhibited wider range of rapid thermal process windows, lower sheet resistance in spite of high temperature annealing up to $700^{\circ}C$ for 30 min, more uniform interface via FE-SEM analysis, NiSi phase peak. Therefore, The proposed Ni/Ni-Co structure is highly promising for highly thermal immune Ni-silicide for nano-scale MOSFET technology.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.11
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• pp.1000-1004
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• 2006

In this paper, thermal stability of Ni-silicide formed on the SOI substrate with $B_{11}$ has been characterized. The sheet resistance of Ni-silicide on un-doped SOI and $B_{11}$ implanted bulk substrate was increased after the post-silicidation annealing at $700^{\circ}C$ for 30 min. However, in case of $B_{11}$ implanted SOI substrate, the sheet resistance showed stable characteristics after the post-silicidation annealing up to $700^{\circ}C$ for 30 min. The main reason of the excellent property of $B_{11}$ sample is believed to be the retardation of Ni diffusion by the boron and bottom oxide layer of SOI. Therefore, retardation of Ni diffusion is highly desirable lot high performance Ni silicide technology.

• Applied Microscopy
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• v.24 no.4
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• pp.123-131
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• 1994

In this study the initial stage nucleation and growth of Ni silicide on (001) Si by evaporation and furnace annealing have been investigated by transmission electron microscopy. The pressure was $10^{-6}$ Torr during evaporation and annealing. And the annealing temperature to produce $NiSi_2\;was\;800^{\circ}C$. From the evaporated film, $NiSi_2$ nucleus has grown into Si substrate with an epitaxial orientation relationship. Interfaces between $NiSi_2$ and Si were A-type {111} interfaces and {100} $NiSi_2$ interfaces were also observed at the initial stage of nucleation. Ni silicide grew into Si substrate, but the nucleus partly grew into the evaporated film, with no facets, from the nuclei in the Si substrate. $NiSi_2$ nucleus with (111) habit planes was also observed.

• Korean Journal of Materials Research
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• v.10 no.9
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• pp.601-606
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• 2000

Nickel mono-silicide(NiSi) shows no increase of resistivity as the line width decreases below 0.15$\mu\textrm{m}$. Furthermore, thin silicide can be made easily and restrain the redistribution of dopants, because NiSi in created through the reaction of one nickel atom and one silicon atom. Therefore, we investigated the deposition condition of Ni films, heat treatment condition and basic properties of NiSi films which are expected to be employed for sub-0.15$\mu\textrm{m}$ class devices. The nickel silicide film was deposited on the Si wafer by using a dc-magnetron sputter, then annealed at the temperature range of $150~1000^{\circ}C$. Surface roughness of each specimen was measured by using a SPM (scanning probe microscope). Microstructure and qualitative composition analysis were executed by a TEM-EDS(transmission electron microscope-energy dispersive x-ray spectroscope). Electrical properties of the materials at each annealing temperature were measured by a four-point probe. As the results of our study, we may conclude that; 1. SPM can be employed as a non-destructive process to monitor NiSi/NiSi$_2$ transformation. 2. For annealing temperature over $800^{\circ}C$, oxygen pressure $Po_2$ should be kept below $1.5{\times}10^{-11}torr$ to avoid oxidation of residual Ni. 3. NiSi to $NiSi_2$ transformation temperature in our study was $700^{\circ}C$ from the four-point probe measurement.

• Journal of the Semiconductor & Display Technology
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• v.7 no.1
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• pp.7-10
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• 2008

Effect of Pd addition on crystal structures of two nickel silicides, NiSi and $NiSi_2$, is investigated by using an ab initio calculation. A Pd atom substitutes a Ni and Si site, respectively, to evaluate the preferable site between them. Pd prefers Ni site to Si site in NiSi, while it prefers Si site to Ni site in $NiSi_2$. The calculated total energy also indicates that the Pd substitution to Si site stabilizes the $NiSi_2$ structure. This calculated data matches well with the experimental data obtained from Atom probe.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.7 no.3
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• pp.332-337
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• 2006

We prepared 100 nm-thick CoNi composite silicide on a 70 nm-thick polysilicon substrate. Composite silicide laye.s were formed by rapid thermal annealing(RTA) at the temperatures of $700^{\circ}C,\;900^{\circ}C,\;1000^{\circ}C$ for 40 seconds. A Focused ion beam (FIB) was used to make nano-patterns with the operation range of 30 kV and $1{\sim}100$ pA. We investigated the change of thickness, line width, and the slope angle of the silicide patterns by FIB. More easily made with the FIB process than with the conventional polycide process. We successfully fabricated sub-100nm etched patterns with FIB condition of 30kv-30pA. Our result implies that we may integrate nano patterns with our newly proposed CoNi composite silicides.

• Korean Journal of Materials Research
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• v.17 no.2
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• pp.73-80
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• 2007

For the sub-65 nm CMOS process, it is necessary to develop a new silicide material and an accompanying process that allows the silicide to maintain a low sheet resistance and to have an enhanced thermal stability, thus providing for a wider process window. In this study, we have evaluated the property and unit process compatibility of newly proposed composite silicides. We fabricated composite silicide layers on single crystal silicon from $10nm-Ni_{1-x}Co_x/single-crystalline-Si(100),\;10nm-Ni_{1-x}Co_x/poly-crystalline-\;Si(100)$ wafers (x=0.2, 0.5, and 0.8) with the purpose of mimicking the silicides on source and drain actives and gates. Both the film structures were prepared by thermal evaporation and silicidized by rapid thermal annealing (RTA) from $700^{\circ}C\;to\;1100^{\circ}C$ for 40 seconds. The sheet resistance, cross-sectional microstructure, surface composition, were investigated using a four-point probe, a field emission scanning probe microscope, a field ion beam, an X-ray diffractometer, and an Auger electron depth profi1ing spectroscopy, respectively. Finally, our newly proposed composite silicides had a stable resistance up to $1100^{\circ}C$ and maintained it below $20{\Omega}/Sg$., while the conventional NiSi was limited to $700^{\circ}C$. All our results imply that the composite silicide made from NiCo alloy films may be a possible candidate for 65 nm-CMOS devices.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.4
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• pp.260-264
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• 2010

In this paper, Ni silicide is formed on boron cluster ($B_{18}H_{22}$) implanted source/drains for shallow junctions of nano-scale CMOSFETs and its thermal stability is improved, using vacuum annealing. Although Ni silicide on $B_{18}H_{22}$ implanted Si substrate exhibited greater sheet resistance than on the $BF_2$ implanted one, its thermal stability was greatly improved using vacuum annealing. Moreover, the boron depth profile, using vacuum post-silicidation annealing, showed a shallower junction than that using $N_2$ annealing.