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Thermal Stability Improvement of Ni-Silicide using Ni-Co alloy for Nano-scale CMOSFET

나노급 CMOSFET을 위한 니켈-코발트 합금을 이용한 니켈-실리사이드의 열안정성 개선

  • 박기영 (충남대학교 전자공학과) ;
  • 정순연 (충남대학교 전자공학과) ;
  • 한인식 (충남대학교 전자공학과) ;
  • 장잉잉 (충남대학교 전자공학과) ;
  • 종준 (충남대학교 전자공학과) ;
  • 이세광 (충남대학교 전자공학과) ;
  • 이가원 (충남대학교 전자공학과) ;
  • 왕진석 (충남대학교 전자공학과) ;
  • 이희덕 (충남대학교 전자공학과)
  • Published : 2008.01.01

Abstract

In this paper, the Ni-Co alloy was used for thermal stability estimation comparison with Ni structure. The proposed Ni/Ni-Co structure exhibited wider range of rapid thermal process windows, lower sheet resistance in spite of high temperature annealing up to $700^{\circ}C$ for 30 min, more uniform interface via FE-SEM analysis, NiSi phase peak. Therefore, The proposed Ni/Ni-Co structure is highly promising for highly thermal immune Ni-silicide for nano-scale MOSFET technology.

Keywords

References

  1. T. Shibata, K. Hieda, M. Sato, M. Konaka, R. L. M. Dang, and H. Iizuka, 'An optimally designed process for submicron MOSFETs', Tech Dig of IEDM, p. 647, 1981
  2. K. Goto, T. Yamazaki, A. Fushida, S. Inagaki, and H. Yagi, 'Optimization of salicide process for sub 0.1um CMOS device', Symp. on VLSI Tech, p. 119, 1994
  3. Y. Taur, J. Sun, D. Moy, L. K. Wang, B. Davari, S. P. Klepner, and C. Y. Ting, 'Source drain contact resistance in CMOS self-aligned $TiSi_2$', IEEE Trans. Electron Device, Vol. 34, No. 3, p. 575, 1987 https://doi.org/10.1109/T-ED.1987.22965
  4. J. B. Lasky, J. S. Nakos, O. J. Cain, and P. J. Geiss, 'Comparison of transformation to low resistivity phase and agglomeration of $TiSi_2$ and $CoSi_2$', IEEE Trans. Electron Device, 38, p. 262, 1991 https://doi.org/10.1109/16.69904
  5. J. G. Yun, S. Y. Oh, B. F. Huang, H. H. Ji, Y. G. Kim, S. H. Park, H. S. Lee, D. B. Kim, U. S. Kim, H. S. Cha, S. B. Hu, J. G. Lee, S. K. Baek, H. S. Hwang, and H. D. Lee, 'Highly thermal robust NiSi for nanoscale MOSFETs utilizing a novel hydrogen plasma immersion ion implantation and Ni-Co-TiN tri-layer', IEEE Electron Device Lett., Vol. 26, No. 2, p. 90, 2005 https://doi.org/10.1109/LED.2004.841863
  6. T. Morimoto, H. S. Momose, T. Iinuma, I. Kunishima, K. Suguro, H. Okana, I. Katakabe, H. Nakajima, M. Tsuchiaki, M. Ono, Y. Katsumata, and H. Iwai, 'A NiSi salicide technology for advanced logic device', Tech. Dig. of IEDM, p. 653, 1991
  7. M. A. Nicolet and S. S. Lau, 'Formation and characterization of transition-metal silicides', VLSI Electronics Microstructure science, Vol. 6, Chapter 6, Academic press, p. 457, 346, 358, 1983
  8. T. H. Hou, T. F. Lei, and T. S. chao, 'Improvement of junction leakage of nickel silicided junction by a Ti-capping layer', IEEE Electron Device Lett., 20, p. 572, 1999 https://doi.org/10.1109/55.798047