• Title/Summary/Keyword: NMO

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EEPROM Charge Sensors (EEPROM을 이용한 전하센서)

  • Lee, Dong-Kyu;Yang, Byung-Do;Kim, Young-Suk;Kim, Nam-Soo;Lee, Hyung-Gyoo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.8-8
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    • 2010
  • 외부전하를 감지할 수 있는 EEPROM 구조를 기반으로 한 센서를 제안하였다. 부유게이트로부터 확장된 큰 면적의 접촉부위 (CCM)는 외부전하를 고정화하도록 설계되었으며, $0.13{\mu}m$ 단일-다결정 CMOS 공정에 적합한 적층의 금속-절연체-금속 (MIM) 제어케이트구조로 구성되었다. N-채널 EEPROM의 CCW 캐패시터 영역에 양의 전압이 인가되면 제어 게이트의 문턱전압이 음의 방향으로 변화하여 드레인 전류는 증가하는 특성을 보였다. 또한 이미 충전된 외부 캐패시터가 CCW의 부유게이트의 금속영역에 직접 연결되면, 외부 캐패시터로부터 유입된 양의 전하는 n-채널 EEPROM의 드레인 전류를 증가시키지만 반면에 음의 전하는 이를 감소시켰다. 외부 전압과 전하에 의해 PMOS의 특성은 NMOS에 비교하여 반대로 나타남이 확인되었다. EEPROM 인버터의 CCW 영역에 외부전하를 연결하면 인버터의 입-출력 특성이 기준 시료에 비해 외부전하의 극성에 따라 변화하였다. 그러므로, EEPROM 인버터는 외부전하를 감지하여 부유게이트에 고정된 전하의 밀도 크기에 따라 출력을 전압으로 표현할 수 있음을 확인하였다.

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Photo Diode and Pixel Modeling for CMOS Image Sensor SPICE Circuit Analysis (CMOS 이미지센서 SPICE 회로 해석을 위한 포토다이오드 및 픽셀 모델링)

  • Kim, Ji-Man;Jung, Jin-Woo;Kwon, Bo-Min;Park, Ju-Hong;Park, Yong-Su;Lee, Je-Won;Song, Han-Jung
    • 전자공학회논문지 IE
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    • v.46 no.4
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    • pp.8-15
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    • 2009
  • In this paper, we are indicated CMOS Image sensor circuit SPICE analysis for the Photo Diode and pixel Modeling. We get a characteristic of the photoelectric current using a device simulator Medici and develop the Photodiode model for applying a SPICE simulation. For verifying the result, We compared the result of SPICE simulation with the result of mixed mode simulation about the testing circuit structure consisted photodiode and NMOS.

The Characteristics of Desulfurization for Dry-Type High Temperature in a Fluidized Bed Reactor (고온건식탈황을 위한 유동층반응기 특성연구)

  • 장현태
    • Journal of the Korean Society of Safety
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    • v.14 no.1
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    • pp.78-85
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    • 1999
  • The removal characteristics of H$_2$S from IGCC process over the natural manganese ore(NMO) containing several metal oxides($MnO_x$ : 51.85%, $FeO_y$ : 3.86%, CaO : 0.11%) were carried out in a batch type fluidized bed reactor(I.D.=40mm, height=0.8m). The $H_2S$ breakthrough curves were obtained as a function of temperature, initial gas velocity, initial gas concentration, and aspect ratio. The effect of particle size ratio and particle mixing fraction on $H_2S$ removal were investigated with binary system of different particle size. From this study, the adsorption capacity of $H_2S$ increased with temperature but decreased with excess gas velocity. The breakthrough time for $H_2S$ is reduced as the gas velocity is increased which leaded to gas by-passing and gas-solid contacting in a fluidized bed reactor. The results of the binary particle system with different size in batch experimental could predict to improve the behavior of continuous process of $H_2S$ removal efficiency. The natural manganese ore could be considered as potential sorbent in $H_2S$ removal.

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SPICE Simulation of 3D Sequential Inverter Considering Electrical Coupling (전기적 상호작용을 고려한 3차원 순차적 인버터의 SPICE 시뮬레이션)

  • Ahn, Tae-Jun;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2017.05a
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    • pp.200-201
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    • 2017
  • This paper introduces the SPICE simulation results of 3D sequential inverter considering electrical coupling. TCAD data and the SPICE data are compared to verify that the electrical coupling is well considered by using BSIM-IMG for the upper NMOS and LETI-UTSOI model for the lower PMOS. When inter layer dielectric is small, it is confirmed that electrical coupling is well reflected in the top transistor $I_{ds}-V_{gs}$ characteristics according to the change of the bottom transistor gate voltage.

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Parameter analysis for gas hydrate data of East sea using Geobit (지오빗을 이용한 동해 가스하이드레이트 탄성파 자료처리 매개변수 분석)

  • Kim, Young-Wan;Jang, Seong-Hyung;Kim, Hyun-Tae;Yoon, Wang-Joong
    • 한국신재생에너지학회:학술대회논문집
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    • 2006.06a
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    • pp.377-381
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    • 2006
  • A seismic survey for gas hydrate have performed over the East sea by the KIGAM since 1997. General indicator of gas hydrate in seismic data is commonly inferred from the BSR(Bottom Simulating Reflector) that occurred parallel to the sea floor, amplitude decrease at the top of the BSR, amplitude blanking at the bottom of the BSR, decrease of the interval velocity and the reflection phase reversal at the BSR. In this paper we had analyzed optimum parameters of the field data to detect the 9as hydrate. Shot delay correction is applied 95ms, spherical divergence correction is applied velocity library 3, bandpass filter is applied 25-30-115-120Hz deconvolution operator length is applied 60ms, lag is 6ms and accurate velocity analysis NMO correction, stack is performed. Geobit 2.11.0 developed by the KIGAM was used for all data processing. Processing results say that the BSR occurred parallel to the sea floor were shown at 3,150m/s of two way travel time from the sea floor through shot point 5,000-5,610, and identified the interval velocity decrease around BSR and the reflection phase reversal corresponding to the reflection at the sea floor.

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A study on ESD Protection circuit based on 4H-SiC MOSFET (4H-SiC MOSFET기반 ESD보호회로에 관한 연구)

  • Seo, Jeong-Ju;Do, Kyoung-Il;Seo, Jeong-Ju;Kwon, Sang-Wook;Koo, Yong-Seo
    • Journal of IKEEE
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    • v.22 no.4
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    • pp.1202-1205
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    • 2018
  • In this paper, we proposed ggNMOS based on 4H-SiC material and analyzed its electrical characteristics. 4H-SiC is a wide band-gap meterial, which is superior in area contrast and high voltage characteristics to Si material, and is attracting attention in the power semiconductor field. The proposed device has high robustness and strong snapback characteristics. The process consisted of SiC process and electrical characteristics were analyzed by TLP measurement equipment.

Investigation of threshold voltage change due to the influence of work-function variation of monolithic 3D Inverter with High-K Gate Oxide (고유전율 게이트 산화막을 가진 적층형 3차원 인버터의 일함수 변화 영향에 의한 문턱전압 변화 조사)

  • Lee, Geun Jae;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2022.10a
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    • pp.118-120
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    • 2022
  • This paper investigated the change of threshold voltage according to the influence of work-function variation (WFV) of metal gate in the device structure of monolithic 3-dimension inverter (M3DINV). In addition, in order to investigate the change in threshold voltage according to the electrical coupling of the NMOS stacked on the PMOS, the gate voltages of PMOS were applied as 0 and 1 V and then the electrical coupling was investigated. The average change in threshold voltage was measured to be 0.1684 V, and they standard deviation was 0.00079 V.

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Implementation of Ternary Valued Adder and Multiplier Using Current Mode CMOS (전류모드 CMOS에 의한 3치 가산기 및 승산기의 구현)

  • Seong, Hyeon-Kyeong
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.9
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    • pp.1837-1844
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    • 2009
  • In this paper, the circuit of 2 variable ternary adder and multiplier circuit using current mode CMOS are implemented. The presented ternary adder circuit and multiplier circuit using current mode CMOS are driven the voltage levels. We show the characteristics of operation for these circuits simulated by HSpice. These circuits are simulated under $0.18{\mu}m$ CMOS standard technology, $5{\mu}A$ unit current in $0.54{\mu}m/0.18{\mu}m$ ratio of NMOS length and width, and $0.54{\mu}m/0.18{\mu}m$ ratio of PMOS length and width, and 2.5V VDD voltage, MOS model Level 47 using HSpice. The simulation results show the satisfying current characteristics. The simulation results of current mode ternary adder circuit and multiplier circuit show the propagation delay time $1.2{\mu}s$, operating speed 300KHz, and consumer power 1.08mW.

Study of the Hole Trapping in the Gate Oxide due to the Metal Antenna Effect (Metal Antenna 효과로 인한 게이트 산화막에서 정공 포획에 관한 연구)

  • 김병일;이재호;신봉조;이형규;박근형
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.36D no.3
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    • pp.34-40
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    • 1999
  • Recently, the gate oxide damage induced by the plasma processes has been one of the most significant reliability issues as the gate oxide thickness falls below 10 nm. The plasma-induced damage was studied with the metal antenna test structures. In addition to the electron trapping, the hole trapping in a 10 nm thick gate oxide due to the plasma-induced charging was observed in the NMOS's with a metal antenna. The hole trapping caused the transconductance (gm) to be reduced like the case of the electron trapping, but to the extent much less than the electron trapping. It would be because the electrical stress that the plasma-induced charging forced to the gate oxide for the devices with the hole trapping was much smaller than for those with the electron trapping. This hypothesis was strongly supported by the measured characteristics of the Fowler-Nordheim current in the gate oxide.

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A Charge Pump with Improved Charge Transfer Capability and Relieved Bulk Forward Problem (전하 전달 능력 향상 및 벌크 forward 문제를 개선한 CMOS 전하 펌프)

  • Park, Ji-Hoon;Kim, Joung-Yeal;Kong, Bai-Sun;Jun, Young-Hyun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.4
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    • pp.137-145
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    • 2008
  • In this paper, novel CMOS charge pump having NMOS and PMOS transfer switches and a bulk-pumping circuit has been proposed. The NMOS and PMOS transfer switches allow the charge pump to improve the current-driving capability at the output. The bulk-pumping circuit effectively solves the bulk forward problem of the charge pump. To verify the effectiveness, the proposed charge pump was designed using a 80-nm CMOS process. The comparison results indicate that the proposed charge pump enhances the current-driving capability by more than 47% with pumping speed improved by 9%, as compared to conventional charge pumps having either NMOS or PMOS transfer switch. They also indicate that the charge pump reduces the worst-case forward bias of p-type bulk by more than 24%, effectively solving the forward current problem.