• Journal of Advanced Navigation Technology
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• v.23 no.2
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• pp.172-178
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• 2019

This paper has designed, fabricated, and analyzed the passive devices realized using low temperature co-fired ceramic (LTCC) multi layer substrates by dividing into the shrinkage process and the non-shrinkage process. Using two types of ceramic materials with dielectric constant 7 or 40, we have fabricated the same shape of various elements in 2 different processes and compared the characteristics. For the substrate of dielctric constant 40, compared with the shrinkage process which has 17% shrink in the X and Y directions with 36% shrink in the Z direction, the non-shrinkage process has 43% shrink in the Z direction without shrink in the X and Y directions, so high dimensional accuracy and surface flatness can be obtained. The inductances and capacitances of the fabricated elements are estimated from measurement using empirical analysis equations of parameters and implemented as a design library. Depending on the substrate and the process, the inductance and capacitance depending on the turn number of winding and unit area have been measured, and empirical polynomials are proposed to predict element values.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.139-142
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• 2001

As microeletronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important for many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (5-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.496-500
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• 2003

In This paper, a pole-zero optimized design method for multi-layed planar interdigital stripeline linear group delay bandpass filter with tap input port is presented. As a design example, a four-pole group delay filter with center frequency of 2.14GHz, bandwidth of 160MHz, and group delay variation of ${\pm}0.1nS$ for LTCC technology or multilayerd PCB technology is designed. In the design process, as well the whole structure is not necessary to be simulated, and within three times of optimizing process we have good result as well. This design method could be useful for controlling error correction of manufacturing process as well as design stage.

• KIEE International Transactions on Electrophysics and Applications
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• v.4C no.6
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• pp.300-305
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• 2004

In this paper, new design equations based on the pole-zero analysis for multi-layered interdigital stripline linear group delay bandpass filter with tap input ports are presented. As a design example, a four-pole group delay filter with center frequency of 2.14GHz, bandwidth of 160MHz, and group delay variation of $\pm$0.1nS for LTCC technology or multilayered PCB technology is designed. In the design process, it is not necessary to simulate the entire structure, as the simulation of half structures is sufficient. Good results can be attained after the optimizing process was performed three times using the proposed equations and a commercial EM simulator.

• ETRI Journal
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• v.41 no.6
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• pp.811-819
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• 2019

We propose a substrate with high thermal conductivity, manufactured by the low-temperature co-fired ceramic (LTCC) multilayer circuit process technology, as a new DC/DC converter platform for power electronics applications. We compare the reliability and power conversion efficiency of a converter using the LTCC substrate with the one using a conventional printed circuit board (PCB) substrate, to demonstrate the superior characteristics of the LTCC substrates. The power conversion efficiencies of the LTCC- and PCB-based synchronous buck converters are 95.5% and 94.5%, respectively, while those of nonsynchronous buck converters are 92.5% and 91.3%, respectively, at an output power of 100 W. To verify the reliability of the LTCC-based converter, two types of tests were conducted. Storage temperature tests were conducted at -20 ℃ and 85 ℃ for 100 h each. The variation in efficiency after the tests was less than 0.3%. A working temperature test was conducted for 60 min, and the temperature of the converter was saturated at 58.2 ℃ without a decrease in efficiency. These results demonstrate the applicability of LTCC as a substrate for power conversion systems.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2007.05a
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• pp.51-54
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• 2007

The purpose of this paper is the development of measurement algorithm for green-sheet based on the digital image processing technique. The Low Temperature Cofired Ceramic (LTCC) technology can be defined as a way to produce multilayer circuits with the help of single tapes, which are used to apply conductive, dielectric and / or resistive pastes on. These single green-sheets have to be laminated together and fired in one step all. Main functionality of the green-sheet film measurement algorithm is to measure the position and size of the punching hole in each single layer. The line scan camera coupled with motorized X-Y stage is used for developing the algorithm. In order to measure the entire film area using several scanning steps, the overlapping method is used. In the process of development of the algorithm based on the image processing and analysis, strong background technology and know-how have been accumulated.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.2 s.35
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• pp.105-109
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• 2005

A compact antenna switch module for GSM/DCS dual band applications based on multilayer low temperature co-fired ceramic (LTCC) substrate is presented. Its size is $4.5{\times}3.2{\times}0.8 mm^3$ and insertion loss is lower than 1.0 dB at Rx mode and 1.2 dB at Tx mode. To verify the stability of the developed module to the process window, each block that is diplexer, LPF's and bias circuit is measured by probing method in the variation with the thickness of ceramic layer and the correlation between each block is quantified by calculating the VSWR In the mean while, two types of bias circuits -lumped and distributed - are compared. The measurement of each block and the calculation of VSWR give good information on the behavior of full module. The reaction of diplexer to the thickness is similar to those of LPF's and bias circuit, which means good relative matching and low value of VSWR, so total insertion loss is maintained in quite wide range of the thickness of ceramic layer at both band. And lumped type bias circuit has smaller insertion itself and better correspondence with other circuit than distributed stripline structure. Evaluated ceramic module adopting lumped type bias circuit has low insertion loss and wider stability region of thickness over than 6um and this can be suitable for the mass production. Stability characterization by probing method can be applied widely to the development of ceramic modules with embedded passives in them.

• ETRI Journal
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• v.23 no.1
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• pp.23-32
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• 2001

Examination of the statistical variation of integrated passive components is crucial for designing and characterizing the performance of multichip module (MCM) substrates. In this paper, the statistical analysis of parallel plate capacitors with gridded plates manufactured in a multilayer low temperature cofired ceramic (LTCC) process is presented. A set of integrated capacitor structures is fabricated, and their scattering parameters are measured for a range of frequencies from 50 MHz to 5 GHz. Using optimized equivalent circuits obtained from HSPICE, mean and absolute deviation is calculated for each component of each device model. Monte Carlo Analysis for the capacitor structures is then performed using HSPICE. Using a comparison of the Monte Carlo results and measured data, it is determined that even a small number of sample structures, the statistical variation of the component values provides an accurate representation of the overall capacitor performance.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.669-672
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• 2003

With the advances on wireless internet technology, many research on minimization of wireless LAN is on the progress. To apply passive components in MCM, characteristic analysis of passive components is essential. In this paper, three square spiral inductors were modeled by HSPICE using PEEC (Partial Element Equivalent Circuit) method. Afterwards, Monte-Carlo analysis was performed to evaluate the optimized parameters. This work will give an idea on PEEC modeling of spiral inductor, and enable researchers with predictive data before large scale manufacturing.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2002.11a
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• pp.157-160
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• 2002

In this paper, a novel lumped equivalent circuit for a conventional parallel directional coupler is proposed. The equivalent circuit and design formula for the presented lumped element coupler is derived based on the even-and odd-mode properties of a parallel-coupled line. By using the derived design formula, we have designed the 3㏈ and 10㏈ lumped element directional couplers at the center frequency of 100Mhz. Furthermore, a chip type directional coupler has been designed to fabricate with multilayer configurations by employing the Low Temperature CofiredCeramic (LTCC) process. Designed chip-type directional coupler has a 10㏈-coupling value at the center frequency of 2㎓. Excellent agreements between simulations and measurements on the designed directional couplers show the validity of this paper