• 제목/요약/키워드: Memory support

검색결과 502건 처리시간 0.031초

IMT2000 단말기용 Viterbi Decoder의 FPGA 구현 (Implementation of viterbi Decoder for IMT2000 Mobile Station in FPGA form)

  • 김진일;정완용;김동현;정건필;조춘식
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 하계종합학술대회 논문집
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    • pp.825-828
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    • 1999
  • A Viterbi Decoder for IMT2000 Mobile Station based on cdma200 is implemented in this paper. There are fundamental traffic channel, supplemental traffic channel for user data transmission and dedicated control channel for signal transmission in cdma2000. This decoder can decode these channels simultaneously, and support l/2, l/3, 1/4 code rate decoding. In case of fundamental channel decoding, it needs about 1100 logic cells and 30000 bit memory block.

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Analysis of Cloud Service Providers

  • Lee, Yo-Seob
    • International Journal of Advanced Culture Technology
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    • 제9권3호
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    • pp.315-320
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    • 2021
  • Currently, cloud computing is being used as a technology that greatly changes the IT field. For many businesses, many cloud services are available in the form of custom, reliable, and cost-effective web applications. Most cloud service providers provide functions such as IoT, machine learning, AI services, blockchain, AR & VR, mobile services, and containers in addition to basic cloud services that support the scalability of processors, memory, and storage. In this paper, we will look at the most used cloud service providers and compare the services provided by the cloud service providers.

A Study on Effect of Code Distribution and Data Replication for Multicore Computing Architectures

  • Cho, Doosan
    • International Journal of Advanced Culture Technology
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    • 제9권4호
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    • pp.282-287
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    • 2021
  • A multicore system must be able to take full advantage of the program's instruction and data parallelism. This study introduces the data replication technique as a support technique to maximize the program's instruction and data parallelism. Instruction level parallelism can be limited by data dependency. In this case, if data is replicated to each processor core and used, instruction level parallelism can be used to the maximum. The technique proposed in this study can maximize the performance improvement effect when applied to scientific applications such as matrix multiplication operation.

AMBA Platform을 기반으로 하는 SoC 상의 DMAC 설계 (Implementation of DMAC on SoC based on AMBA Platform)

  • 황인기;김정식
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2004년도 학술대회 논문집 정보 및 제어부문
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    • pp.417-419
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    • 2004
  • Because of the demands for high performance and high integrated system, the needs for optimal platform becomes more importance. Optimal platform can handle more data effectively with same resources. AMBA(Advanced Microprocessor Bus Architecture)$^{TM}$ defines on-chip communication standard for designing high performance embedded micro-controllers. It is consisted of AHB, ASB and APB. It can support fast implementation and reliability in system that is composed with reusable IPs. DMAC is one of master in system and generate master signals of AHB to communicate data from one slave(peripheral or memory) to another slave. It can reduce burden of CPU and increase system performance. We designed DMAC based on AMBA and it supports 13 Channels. Each channel can be controlled by software program. It decides channel's priority using round-robin method. It can support P2P, P2M, M2P and P2P communication.

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Combining Empirical Feature Map and Conjugate Least Squares Support Vector Machine for Real Time Image Recognition : Research with Jade Solution Company

  • Kim, Byung Joo
    • International Journal of Internet, Broadcasting and Communication
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    • 제9권1호
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    • pp.9-17
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    • 2017
  • This paper describes a process of developing commercial real time image recognition system with company. In this paper we will make a system that is combining an empirical kernel map method and conjugate least squares support vector machine in order to represent images in a low-dimensional subspace for real time image recognition. In the traditional approach calculating these eigenspace models, known as traditional PCA method, model must capture all the images needed to build the internal representation. Updating of the existing eigenspace is only possible when all the images must be kept in order to update the eigenspace, requiring a lot of storage capability. Proposed method allows discarding the acquired images immediately after the update. By experimental results we can show that empirical kernel map has similar accuracy compare to traditional batch way eigenspace method and more efficient in memory requirement than traditional one. This experimental result shows that proposed model is suitable for commercial real time image recognition system.

SVQR with asymmetric quadratic loss function

  • Shim, Jooyong;Kim, Malsuk;Seok, Kyungha
    • Journal of the Korean Data and Information Science Society
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    • 제26권6호
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    • pp.1537-1545
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    • 2015
  • Support vector quantile regression (SVQR) can be obtained by applying support vector machine with a check function instead of an e-insensitive loss function into the quantile regression, which still requires to solve a quadratic program (QP) problem which is time and memory expensive. In this paper we propose an SVQR whose objective function is composed of an asymmetric quadratic loss function. The proposed method overcomes the weak point of the SVQR with the check function. We use the iterative procedure to solve the objective problem. Furthermore, we introduce the generalized cross validation function to select the hyper-parameters which affect the performance of SVQR. Experimental results are then presented, which illustrate the performance of proposed SVQR.

A New Support Vector Compression Method Based on Singular Value Decomposition

  • Yoon, Sang-Hun;Lyuh, Chun-Gi;Chun, Ik-Jae;Suk, Jung-Hee;Roh, Tae-Moon
    • ETRI Journal
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    • 제33권4호
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    • pp.652-655
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    • 2011
  • In this letter, we propose a new compression method for a high dimensional support vector machine (SVM). We used singular value decomposition (SVD) to compress the norm part of a radial basis function SVM. By deleting the least significant vectors that are extracted from the decomposition, we can compress each vector with minimized energy loss. We select the compressed vector dimension according to the predefined threshold which can limit the energy loss to design criteria. We verified the proposed vector compressed SVM (VCSVM) for conventional datasets. Experimental results show that VCSVM can reduce computational complexity and memory by more than 40% without reduction in accuracy when classifying a 20,958 dimension dataset.

3-TIER 구조 소프트웨어의 다국어 지원 방식의 설계와 구현 (Design and Implementation of Multilingual support method for 3-tiered softwares)

  • 고정국
    • 한국멀티미디어학회논문지
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    • 제15권2호
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    • pp.266-272
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    • 2012
  • 해외 시장을 겨냥한 소프트웨어의 상품화를 위해서는 여러 나라의 언어를 지원하는 다국어 지원 기능이 필요하다. 3-tier 구조는 2-tier 구조의 문제점을 해결하기 위해 애플리케이션을 분리하여 응용 계층을 두고 프리젠테이션 로직과 데이터베이스를 미들웨어로 연결하는 형태이다. 3-tier 구조의 장점은 애플리케이션의 부하 분산으로 성능이 향상되며 확장이 쉽고, 유지보수와 재사용이 용이하다는 점이다. 본 논문에서는 3-tier 구조의 기업용 소프트웨어를 대상으로 소프트웨어 개발과 유지보수, 지원 언어의 추가가 용이한 공통 리소스 활용 방식을 제안하고 빌링 솔루션의 다국어 버전 개발에 적용하여 유용성을 확인한다. 제안하는 방식은 기능 모듈마다 언어별 리소스 파일을 별도로 유지하는 닷넷의 기존 방식을 개선하여 언어별로 하나만 유지하고 다국어 지원 클래스 라이브러리 형태로 제공하여 메모리와 디스크의 공간 낭비를 줄인다. 또한 다국어 지원 클래스 라이브러리를 응용 계층에 배치하여 소프트웨어 개발과 유지보수, 지원 언어 추가가 용이하다. 한편 리소스 파일에 대한 부적절한 변경을 막기 위해 다국어 지원 클래스 라이브러리는 dll 파일로 제공한다.

Novel Graphene Volatile Memory Using Hysteresis Controlled by Gate Bias

  • Lee, Dae-Yeong;Zang, Gang;Ra, Chang-Ho;Shen, Tian-Zi;Lee, Seung-Hwan;Lim, Yeong-Dae;Li, Hua-Min;Yoo, Won-Jong
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2011년도 제41회 하계 정기 학술대회 초록집
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    • pp.120-120
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    • 2011
  • Graphene is a carbon based material and it has great potential of being utilized in various fields such as electronics, optics, and mechanics. In order to develop graphene-based logic systems, graphene field-effect transistor (GFET) has been extensively explored. GFET requires supporting devices, such as volatile memory, to function in an embedded logic system. As far as we understand, graphene has not been studied for volatile memory application, although several graphene non-volatile memories (GNVMs) have been reported. However, we think that these GNVM are unable to serve the logic system properly due to the very slow program/read speed. In this study, a GVM based on the GFET structure and using an engineered graphene channel is proposed. By manipulating the deposition condition, charge traps are introduced to graphene channel, which store charges temporarily, so as to enable volatile data storage for GFET. The proposed GVM shows satisfying performance in fast program/erase (P/E) and read speed. Moreover, this GVM has good compatibility with GFET in device fabrication process. This GVM can be designed to be dynamic random access memory (DRAM) in serving the logic systems application. We demonstrated GVM with the structure of FET. By manipulating the graphene synthesis process, we could engineer the charge trap density of graphene layer. In the range that our measurement system can support, we achieved a high performance of GVM in refresh (>10 ${\mu}s$) and retention time (~100 s). Because of high speed, when compared with other graphene based memory devices, GVM proposed in this study can be a strong contender for future electrical system applications.

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PLZF+ Innate T Cells Support the TGF-β-Dependent Generation of Activated/Memory-Like Regulatory T Cells

  • Kang, Byung Hyun;Park, Hyo Jin;Park, Hi Jung;Lee, Jae-Il;Park, Seong Hoe;Jung, Kyeong Cheon
    • Molecules and Cells
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    • 제39권6호
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    • pp.468-476
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    • 2016
  • PLZF-expressing invariant natural killer T cells and CD4 T cells are unique subsets of innate T cells. Both are selected via thymocyte-thymocyte interaction, and they contribute to the generation of activated/memory-like CD4 and CD8 T cells in the thymus via the production of IL-4. Here, we investigated whether $PLZF^+$ innate T cells also affect the development and function of $Foxp3^+$ regulatory CD4 T cells. Flow cytometry analysis of the thymus and spleen from both CIITA transgenic C57BL/6 and wild-type BALB/c mice, which have abundant $PLZF^+$ CD4 T cells and invariant natural killer T cells, respectively, revealed that $Foxp3^+$ T cells in these mice exhibited a $CD103^+$ activated/memorylike phenotype. The frequency of $CD103^+$ regulatory T cells was considerably decreased in $PLZF^+$ cell-deficient $CIITA^{Tg}Plzf^{lu/lu}$ and $BALB/c.CD1d^{-/-}$ mice as well as in an IL-4-deficient background, such as in $CIITA^{Tg}IL-4^{-/-}$ and $BALB/c.IL-4^{-/-}$ mice, indicating that the acquisition of an activated/ memory-like phenotype was dependent on $PLZF^+$ innate T cells and IL-4. Using fetal thymic organ culture, we further demonstrated that IL-4 in concert with TGF-${\beta}$ enhanced the acquisition of the activated/memory-like phenotype of regulatory T cells. In functional aspects, the activated/ memory-like phenotype of Treg cells was directly related to their suppressive function; regulatory T cells of $CIITA^{Tg}PIV^{-/-}$ mice more efficiently suppressed ovalbumin-induced allergic airway inflammation compared with their counterparts from wild-type mice. All of these findings suggest that $PLZF^+$ innate T cells also augmented the generation of activated/memory-like regulation via IL-4 production.