Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 1999.06a
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- Pages.825-828
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- 1999
Implementation of viterbi Decoder for IMT2000 Mobile Station in FPGA form
IMT2000 단말기용 Viterbi Decoder의 FPGA 구현
Abstract
A Viterbi Decoder for IMT2000 Mobile Station based on cdma200 is implemented in this paper. There are fundamental traffic channel, supplemental traffic channel for user data transmission and dedicated control channel for signal transmission in cdma2000. This decoder can decode these channels simultaneously, and support l/2, l/3, 1/4 code rate decoding. In case of fundamental channel decoding, it needs about 1100 logic cells and 30000 bit memory block.
Keywords