• 열처리공학회지
• /
• 제30권6호
• /
• pp.251-257
• /
• 2017

The effect of annealing temperature on the martensitic transformation behavior, tensile deformation chracteristics and shape recovery etc., has been studied in TiNi based shape memory ribbon fabricated by coldrolling of wire. TiNi based shape memory wire (${\phi}=500{\mu}m$) of which structure is intermetallic compound could be cold-rolled without process annealing up to the reduction rate in thickness of 50%, but a few cracks appear in cold-rolled ribbon in the reduction rate in thickness of 65%. The $B2{\rightarrow}R{\rightarrow}B19^{\prime}$ martensitic transformation or $B2{\rightarrow}B19^{\prime}$ martensitic transformation occurs in annealing conditions dissipating lattice defects introduced by coldrolling. However, in case of higher reduction rate or lower annealing temperature, martensitic transformation in cold-rolled and then annealed ribbons does not occur. The maximum shape recovery rate of cold-rolled ribbons with the reduction rate of 35 and 65% could be achieved at annealing temperatures of 250 and $350^{\circ}C$, respectively. The shape recovery rate seems to be related to the stress level of plateau region on stress-strain curve.

• 전자공학회논문지A
• /
• 제30A권1호
• /
• pp.8-15
• /
• 1993

A concrete disign of memory circuit is presented aiming at the application of sliding diagonal test patterns. A modification of sliding diagonal test pattern includes the complexity reduction from O(n$^{32}$) to O(n) using parallel test memory concept. The control circuit design was based on delay-element, and verified via logic and circuit simulation. Area overhead was evaluated based on physical layout using a 0.7 micron design rule resulting in about 1% area increase for a typical 16Mbit DRAM.

• 전자공학회논문지D
• /
• 제34D권1호
• /
• pp.30-34
• /
• 1997

An improved clock-feedthrough compensation scheme for switche dcurrent system is proposed. Both the signal dependent and the constant clock-feedthrough terms are cancelled by using both NMOS and PMOS current samplers and by adopting a source replication technique. The proposed current memory cell was fabricated with 0.6$\mu$m CMOS process. Both experimental and theoretical results on clock-feedthrough error reveal substantial reduction over the existing compensation schemes.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제17권2호
• /
• pp.199-203
• /
• 2017

Mutually-actuated-nano-electromechanical (MA-NEM) memory switches are proposed for scalability improvement. While conventional NEM memory switches have fixed electrode lines, the proposed MA-NEM memory switches have mutually-actuated cantilever-like electrode lines. Thus, MA-NEM memory switches show smaller deformations of beams in switching. This unique feature of MA-NEM memory switches allows aggressive reduction of the beam length while maintaining nonvolatile property. Also, the scalability of MA-NEM memory switches is confirmed by using finite-element (FE) simulations. MA-NEM memory switches can be promising solutions for reconfigurable logic (RL) circuits.

• 대한임베디드공학회논문지
• /
• 제10권3호
• /
• pp.151-156
• /
• 2015

Recently, an embedded flash memory has been widely used for the Internet of Things(IoT). Due to its nonvolatility, economical feasibility, stability, low power usage, and fast speed. With respect to power consumption, the embedded memory system must consider the most significant design factor. The objective of this research is to design high performance and low power NAND flash memory architecture including a dual buffer as a replacement for NOR flash. Simulation shows that the proposed NAND flash system can achieve better performance than a conventional NOR flash memory. Furthermore, the average memory access time of the proposed system is better that of other buffer systems with three times more space. The use of a small buffer results in a significant reduction in power consumption.

• 한국멀티미디어학회논문지
• /
• 제14권1호
• /
• pp.94-102
• /
• 2011

JPEG2000 시스템에서 요구하는 메모리의 크기와 대역폭을 감소시키기 위하여 본 논문은 약간의 화질 손실이 있는 새로운 임베디드 압축(Embedded Compression) 알고리즘을 제안한다. 또한, 메모리 내의 압축된 데이터에 임의 접근성(Random Accessibility)과 짧은 지연 시간(Latency)을 보장하기 위해서 매우 단순하면서도 효율적인 하다마드(Hadamard) 변환 기반의 부호화 방식을 제안한다. JPEG2000 표준안의 알고리즘에 변경을 주지 않고, 제안한 EC 알고리즘을 통해 LL 임시 메모리의 크기와 코드블록 메모리의 크기를 약 2 배로 줄이며, 약 52~73%의 메모리 대역폭을 감소시킬 수 있다.

• 대한전자공학회논문지SD
• /
• 제45권6호
• /
• pp.37-42
• /
• 2008

H.264/AVC 복호기에서는 인트라 예측기 뿐만 아니라 움직임 보상기, 디블럭킹 필터 등 각 IP들이 복호화를 위한 참조 영상 값들을 필요로 한다. 이들 IP들은 참조 영상을 읽어들이기 위하여 외부 메모리에 빈번하게 접근하는데, 이때문에 시스템 동작 속도도 낮아지고 전력 소모도 증가한다. 본 논문에서는 공통적이고 반복적인 블록의 재사용을 통하여 연산량을 줄이고 전력 소모 및 메모리 대역폭을 최소화하도록 외부 메모리를 사용하지 않는 움직임 보상기와 연계한 인트라 예측기를 제안하였다. 제안된 인트라 예측기는 기존에 비해 $45%\;{\sim}\;75%$ 가량 사이클 수를 감소시켰다.

• 소성∙가공
• /
• 제18권1호
• /
• pp.45-51
• /
• 2009

Shape memory alloy has been used to improve the tensile strength of composite by the occurrence of compressive residual stress in matrix using its shape memory effect. In order to fabricate shape memory alloy composite, TiNi alloy fiber and Al2024 sheets were used as reinforcing material and matrix, respectively. In this study, TiNi/Al2024 shape memory alloy composite was made by using hot press method. In order to investigate bonding condition between TiNi reinforcement and Al matrix, the micro-structure of interface was observed by using optical microscope and diffusion layer of interface was measured by using Electron Probe Micro Analyser. And the mechanical properties of composite with three parameters(volume fraction of fiber, cold rolling amount and test temperature) were obtained by tensile test. The most optimum bonding condition for fabrication the TiNi/Al2024 composite material was obtained as holding for 30min. under the pressure of 60MPa at 793K. The strength of composite material increased considerably with the volume fraction of fiber up to 7.0%. And the tensile strength of this composite increased with the reduction ratio and it also depends on the volume fraction of fiber.

• Communications for Statistical Applications and Methods
• /
• 제26권5호
• /
• pp.497-506
• /
• 2019

Forecasting the U.S. employment level is made using machine learning methods of the artificial neural network: deep neural network, long short term memory (LSTM), gated recurrent unit (GRU). We consider the big data of the federal reserve economic data among which 105 important macroeconomic variables chosen by McCracken and Ng (Journal of Business and Economic Statistics, 34, 574-589, 2016) are considered as predictors. We investigate the influence of the two statistical issues of the dimension reduction and time series differencing on the machine learning forecast. An out-of-sample forecast comparison shows that (LSTM, GRU) with differencing performs better than the autoregressive model and the dimension reduction improves long-term forecasts and some short-term forecasts.

• 한국통신학회논문지
• /
• 제28권2B호
• /
• pp.129-137
• /
• 2003

MPEG(Motion Picture Expert Group)과 같은 멀티미디어 스트림은 연속적 재생으로 인해 데이터의 지속적인 디스크 검색을 요구한다. 따라서, 커널의 효율적인 지원이 필요한데, 유닉스 계열의 리눅스 버퍼 캐시 시스템은 비정기적이고 비실시간 데이터인 텍스트 데이터용으로 설계되었다. 대용량의 연속 미디어의 경우 커널 주소공간에서 사용자 주소공간으로의 대량의 복사가 이루어지므로 이 과정에서 CPU의 과중한 오버헤드가 발생한다. 이것은 시스템 처리율을 저하시킬 뿐만 아니라 QOS(Quality of Service)도 보장할 수 없다. 본 논문에서 이 메모리 복사 오버헤드를 감소시키기 위한 direct I/O와 one copy 기법을 리눅스 커널에서 설계 및 구현하였다. direct I/O는 디스크의 데이터를 커널 버퍼로 복사하지 않고 사용자 버퍼로 직접 복사하므로 CPU 오버헤드를 획기적으로 감소시킬 수 있다. 그리고, one-copy는 사용자 버퍼로 데이터를 복사하지 않고 직접 네트워크로 전송하는 기법이다. 구현 결과, CPU 오버헤드의 상당한 감소와 시스템의 처리율이 향상됨을 확인하였다.