JSTS:Journal of Semiconductor Technology and Science

The Institute of Electronics and Information Engineers (대한전자공학회)
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Mutually-Actuated-Nano-Electromechanical (MA-NEM) Memory Switches for Scalability Improvement

  • Lee, Ho Moon (Department of Electronic Engineering, Sogang University) ;
  • Choi, Woo Young (Department of Electronic Engineering, Sogang University)
  • Received : 2016.08.24
  • Accepted : 2016.10.09
  • Published : 2017.04.30
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Abstract

Mutually-actuated-nano-electromechanical (MA-NEM) memory switches are proposed for scalability improvement. While conventional NEM memory switches have fixed electrode lines, the proposed MA-NEM memory switches have mutually-actuated cantilever-like electrode lines. Thus, MA-NEM memory switches show smaller deformations of beams in switching. This unique feature of MA-NEM memory switches allows aggressive reduction of the beam length while maintaining nonvolatile property. Also, the scalability of MA-NEM memory switches is confirmed by using finite-element (FE) simulations. MA-NEM memory switches can be promising solutions for reconfigurable logic (RL) circuits.

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References

  1. C. Dong, C. Chen, S. Mitra and D. Chen, "Architecture and performance evaluation of 3D CMOS-NEM FPGA," SLIP'11 Proceedings of the System Level Interconnect Prediction Workshop, pp.2-9, NJ, USA, Jun. 2011
  2. H. Scott, "The roles of FPGAs in reprogrammable systems." Proceedings of the IEEE, vol.86, no.4, pp. 615-638, Apr. 1998. https://doi.org/10.1109/5.663540
  3. D. E. Van den Bout, J. N. Morris, D. Thomae, S. Labrozzi, S. Wingo and P. Hallman, "Anyboard : An FPGA-based, reconfigurable system," IEEE Design & Test, pp.21-30, CA, USA, July. 1992.
  4. S. Chong, B. Lee, J Provine, "Integration of nanoelectromechanical (NEM) relays with silicon CMOS with functional CMOS-NEM circuit." Proceedings of the System Level Interconnect Prediction Workshop. IEEE Press, pp.30.5.1-30.5.4 Washington DC, USA, Dec. 2011
  5. S. Sun and P. G. Y. Tsui, "Limitation of CMOS supply-voltage scaling by MOSFET threshold-voltage variation." IEEE Journal of Solid-State Circuits, vol.30, no.8, pp. 947-949, Aug. 2002.
  6. Y. J. Kim and W.Y. Choi, "Nonvolatile nanoelectromechanical memory switches for low-power and high-speed field-programmable gate arrays," IEEE Trans. Electron Devices, vol.62, no.2, pp.673-679, 2015. https://doi.org/10.1109/TED.2014.2380992
  7. W. Y. Choi and Y. J. Kim, "Three-Dimensional Integration of Complementary Metal-Oxide-Semiconductor (CMOS)-Nano-Electromechanical (NEM) Hybrid Reconfigurable Circuits," IEEE Electron Device Letters, vol.36, no.9, pp. 887-889, Sep. 2015. https://doi.org/10.1109/LED.2015.2455556
  8. S. Chong, B. Lee, K. B. Parizi, J. Provine, S. Mitra, R. T. Howe and H.-S. P. Wong, "Integration of nanoelectromechanical (NEM) relays with silicon CMOS with functional CMOS-NEM circuit," Electron Devices Meeting (IEDM), 2011 IEEE International, pp.701-704, DC, USA, Dec. 2011
  9. K. Kimihiko, V. Stojanovic and T.J.K. Liu, "Non-Volatile Nano-Electro-Mechanical Memory for Energy-Efficient Data Searching." IEEE Electron Device Letters, vol.37, no.1, pp. 31-34, Dec. 2015. https://doi.org/10.1109/LED.2015.2504955
  10. P. Singh, G. L. Chua, Y. S. Liang, K. G. Jayaraman, A. T. Do and T. T. Kim, "Anchor-free NEMS non-volatile memory cell for harsh environment data storage." Journal of Micromechanics and Microengineering, vol.24, no.11, p. 115007, Oct. 2014. https://doi.org/10.1088/0960-1317/24/11/115007
  11. P. Vincent, G. L. Chua, R. Vaddi, J. M. Tsai and T. T. Kim, "The shuttle nanoelectromechanical nonvolatile memory." IEEE Electron Device Society, vol.23, no.4, pp. 1137-1143, Jan. 2012.
  12. B. W. Soon, E. J. Ng, Y. Qian, N. Singh, M. J. Tsai and C. Lee, "A bi-stable nanoelectromechanical non-volatile memory based on van der Waals force." Applied Physics Letters, vol.103, no.5, p. 053122, Feb. 2013. https://doi.org/10.1063/1.4817796
  13. M. P. Boer and T. A. Michalske, "Accurate method for determining adhesion of cantilever beams." Journal of Applied physics, vol.82, no.2, pp. 817-827, July. 1999. https://doi.org/10.1063/1.365778
  14. G. M. Rebeiz, RF MEMS: Theory, design, and technology, 1st ed., Wiley, New York, 2003.
  15. J. A. Knapp, and M. P. Boer, "Mechanics of Microcantilever Beams Subject to Combined Electrostatic and Adhesive Forces," J. Microelectromech. Syst., vol.11, no.6, pp.754-764, 2002. https://doi.org/10.1109/JMEMS.2002.805047
  16. J. Yaung, L. Hutin, J. Jeon, and T. J. K. Liu, "Adhesive force characterization for MEM logic relays with sub-micron contacting regions," J. Microelectromech. Syst., vol.23, no.1, pp.198-203, 2014. https://doi.org/10.1109/JMEMS.2013.2269995
  17. D. Lee, V. Pott, H. Kam, R. Natanael, and T. J. K. Liu, "AFM chracteriztion of adhesion force in micro-relays," Micro Electro Mechanical Systems (MEMS), 2010 IEEE 23rd International Conference on, pp.232-235, Wanchai, Hong Kong, Jan, 2010
  18. G. Boselli, V. Reddy and C. Duvvury, "Latch-up in 65nm CMOS technology: a scaling perspective." Reliability Physics Symposium, 2005. Proceedings. 43rd Annual, Dallas, USA, pp.137-144, Apr. 2005.