• ETRI Journal
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• 제32권1호
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• pp.68-72
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• 2010

The coupling between the transverse and longitudinal components of the channel electron motion in NMOS devices leads to a reduction in the barrier height. Therefore, this study theoretically investigates the effects of the in-plane velocity of channel electrons on the capacitance-voltage characteristics of nano NMOS devices under inversion bias. Numerical calculation via a self-consistent solution to the coupled Schrodinger equation and Poisson equation is used in the investigation. The results demonstrate that such a coupling largely affects capacitance-voltage characteristic when the in-plane velocity of channel electrons is high. The ballistic transport ensures a high in-plane momentum. It suggests that such a coupling should be considered in the quantum capacitance-voltage modeling in ballistic transport devices.

• 전자통신동향분석
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• 제32권6호
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• pp.8-16
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• 2017

In this paper, we review studies attempting to triumph over the limitation of Si-based semiconductor technologies through a heterogeneous integration of high mobility compound semiconductors on a Si substrate, and the co-integration of electronic and/or optical devices. Many studies have been conducted on the heterogeneous integration of various materials to overcome the Si semiconductor performance and obtain multi-purpose functional devices. On the other hand, many research groups have invented device fusion technologies of electrical and optical devices on a Si substrate. They have co-integrated Si-based CMOS and InGaAs-based optical devices, and Ge-based electrical and optical devices. In addition, chip and wafer bonding techniques through TSV and TOV have been introduced for the co-integration of electrical and optical devices. Such intensive studies will continue to overcome the device-scaling limitation and short-channel effects of a MOS transistor that Si devices have faced using a heterogeneous integration of Si and a high mobility compound semiconductor on the same chip and/or wafer.

• JSTS:Journal of Semiconductor Technology and Science
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• 제2권3호
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• pp.197-204
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• 2002

DRAM, SRAM, and FLASH memory are three major memory devices currently used in most electronic applications. But, they have very distinct attributes, therefore, each memory could be used only for limited applications. MRAM (Magneto-resistive Random Access Memory) is a promising candidate for a universal memory that meets all application needs with non-volatile, fast operational speed, and low power consumption. The simplest architecture of MRAM cell is a series of MTJ (Magnetic Tunnel Junction) as a data storage part and MOS transistor as a data selection part. To be a commercially competitive memory device, scalability is an important factor as well. This paper is testing the actual electrical parameters and the scaling factors to limit MRAM technology in the semiconductor based memory device by an actual integration of MRAM core cell. Electrical tuning of MOS/MTJ, and control of resistance are important factors for data sensing, and control of magnetic switching for data writing.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1988년도 춘계학술대회 논문집
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• pp.24-26
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• 1988

The electrical properties of thin nitrided thermal oxides prepared by rapid thermal nitridation(RTN) have been studied. The flatband voltages were calculated using C-V measurement and found to vary as nitridation time and temperature. After nitridation an increase in the fixed oxide charge density was always observed, but the distribution of it as a function of annealing time was found to be random. The breakdown voltages were measured using curve tracer.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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• pp.785-787
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• 1988

The capacitance-voltage (C-V) chracteristics of thin nitrided thermal oxides prepared by rapid termal nitridation(RTN) have been studied. The threshold voltages were calculated using C-V measurement and found to vary as the concentration of acceptor and the thickness of oxynitride. When the Si02 films were annealed in NH3 a decrease in the positive oxide charge due to Si-N bond was observed. In the case applied frequency is high and low, the high frequency depletion capacitance was higher than that of low frequency, which is indicative of high frequency surface conduction by mobile surface charge.

• 한국세라믹학회지
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• 제38권9호
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• pp.782-786
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• 2001

Cobalt silicide has been employed to Embedded DRAM (Dynamic Random Access Memory) and Logic (EDL) as contact material to improve its speed. We have investigated the influences of Ti and TiN capping layers on cobalt-silicided Complementary Metal-Oxide-Semiconductor (CMOS) device characteristics. TiN capping layer is shown to be superior to Ti capping layer with respect to high thermal stability and the current driving capability of pMOSFETs. Secondary Ion Mass Spectrometry (SIMS) showed that the Ti capping layer could not prevent the out-diffusion of boron dopants. The resulting operating current of MOS devices with Ti capping layer was degraded by more than 10%, compared with those with TiN.

• JSTS:Journal of Semiconductor Technology and Science
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• 제2권1호
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• pp.7-18
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• 2002

Single-ended differential RF circuit topologies fully utilizing complementary characteristics of both NMOS and PMOS are proposed, which have inherent advantage of both single-ended and differential circuits. Using this concept, we propose a CCPP (Complementary CMOS parallel push-pull) amplifier which has single-ended input/output with differential amplifying characteristics, leading to more than 30 dB improvement on $IIP_2$. In addition, complementary resistive mixer is also proposed, which provides not only differential IF outputs from single-ended RF input, but much better linearity as well as isolation characteristics. Experimental results using $0.35{\;}\mu\textrm{m}$ CMOS process show that, compared with conventional NMOS resistive mixer, the proposed mixer shows 15 dB better LO-to-IF isolation, 4.6 dB better $IIP_2$, and 4.5 dB better $IIP_3$performances.

• 한국전기전자재료학회논문지
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• 제17권6호
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• pp.586-591
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• 2004

We studied the dependence of hot-tarrier-induced degradation characteristics on nitrogen concentration in NO(Nitrided-Oxide) gate of nMOS, under ac and dc stresses. The $\Delta$V$_{t}$ and $\Delta$G$_{m}$ dependence of nitrogen concentration were observed, We observed that device degradation was suppressed significantly when the nitrogen concentration in the gate was increased. Compared to $N_2$O oxynitride, NO oxynitride gate devices show a smaller sensitivity to ac stress frequency. Results suggest that the improved at-hot carrier immunity of the device with NO gate may be due to the significantly suppressed interface state generation and neutral trap generation during stress.ess.

• 한국전기전자재료학회논문지
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• 제17권6호
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• pp.602-607
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• 2004

This paper describes the characteristics of Ru-Zr alloy gate electrodes deposited by co-sputtering. The various atomic composition was made possible by controlling sputtering power of Ru and Zr. Thermal stability was examined through 600 and 700 $^{\circ}C$ RTA annealing. Variation of oxide thickness and X-ray diffraction(XRD) pattern after annealing were employed to determine the reaction at interface. Low and relatively stable sheet resistances were observed for Ru-Zr alloy after annealing. Electrical properties of alloy film were measured from MOS capacitor and specific atomic composition of Zr and Ru was found to yield compatible work function for nMOS. Ru-Zr alloy was stable up to $700^{\circ}C$ while maintaining appropriate work function and oxide thickness.

• 한국전기전자재료학회논문지
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• 제24권10호
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• pp.794-798
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• 2011

This paper was carried out design of 1,700 V Base Resistance Thyristor for fabrication. We decided conventional BRT (base resistance thyristor) device and Trench Gate type one for design. we carried out device and process simulation with T-CAD tools. and then, we have extracted optimal device and process parameters for fabrication. we have analysis electrical characteristics after simulations. As results, we obtained 2,000 V breakdown voltage and 3.0 V Vce,sat. At the same time, we carried out field ring simulation for obtaining high voltage.