• Title/Summary/Keyword: Low Power Testing

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Dynamic Power Supply Current Testing for Open Defects in CMOS SRAMs

  • Yoon, Doe-Hyun;Kim, Hong-Sik;Kang, Sung-Ho
    • ETRI Journal
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    • v.23 no.2
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    • pp.77-84
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    • 2001
  • The detection of open defects in CMOS SRAM has been a time consuming process. This paper proposes a new dynamic power supply current testing method to detect open defects in CMOS SRAM cells. By monitoring a dynamic current pulse during a transition write operation or a read operation, open defects can be detected. In order to measure the dynamic power supply current pulse, a current monitoring circuit with low hardware overhead is developed. Using the sensor, the new testing method does not require any additional test sequence. The results show that the new test method is very efficient compared with other testing methods. Therefore, the new testing method is very attractive.

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A Study on the current harmonic testing for the low-voltage circuit-breaker with electronic over-current protection (전자식 저압 차단기의 전류 고조파 시험에 대한 고찰)

  • Kim, Myoung-Seok;Oh, Jun-Sick;Han, Gyu-Hwan
    • Proceedings of the KIEE Conference
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    • 2002.11d
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    • pp.154-156
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    • 2002
  • 본 논문은 저압 차단기에 적용되는 IEC 60947-2 (Circuit breakers)와 전류고조파(Current harmonic) 내성시험 규격인 IEC 61000-3-2. IEC 61000-3-4에 대한 규격의 적용범위, 시험범위, 고조파에 대한 개념, 차단기의 고조파에 대한 영향 및 시험설비의 요구조건을 고찰하고, 16A 초과 전류 고조파 시험적용 방법과 시험결과를 고찰하고자 한다.

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Energy Management of a Grid-connected High Power Energy Recovery Battery Testing System

  • Zhang, Ke;Long, Bo;Yoo, Cheol-Jung;Noh, Hye-Min;Chang, Young-Won
    • Journal of Electrical Engineering and Technology
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    • v.11 no.4
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    • pp.839-847
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    • 2016
  • Energy recovery battery testing systems (ERBTS) have been widely used in battery manufactures. All the ERBTS are connected in parallel which forms a special and complicated micro-grid system, which has the shortcomings of low energy recovery efficiency, complex grid-connected control algorithms issues for islanded detection, and complicated power circuit topology issues. To solve those shortcomings, a DC micro-grid system is proposed, the released testing energy has the priority to be reutilized between various testing system within the local grid, Compared to conventional scheme, the proposed system has the merits of a simplified power circuit topology, no needs for synchronous control, and much higher testing efficiency. The testing energy can be cycle-used inside the local micro-grid. The additional energy can be recovered to AC-grid. Numerous experimental comparison results between conventional and proposed scheme are provided to demonstrate the validity and effectiveness of the proposed technique.

The study of method and verification that Surge protective devices connected to low-voltage power systems of the thermal stability test (전원용서지보호장치(Surge protective devices connected to low-voltage power systems)의 열안전성시험(Thermal stability test)의 방법 및 판단에 대한 고찰)

  • Choi, Gil;Park, Shin-Woo;Lim, Byung-Bae
    • Proceedings of the KIEE Conference
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    • 2015.07a
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    • pp.1213-1214
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    • 2015
  • 서지보호장치(Surge Protective Device)가 국내에 본격적으로 설치된 것은 산업화의 발전으로 인해 현장 전력시스템의 복잡성과 다양성 및 급격히 변화하고 있는 우리나의 기후변화 때문일 것이다. 전원계통의 전원용서지보호장치(Poser Systems Surge Protective Devices) 및 통신계통의 통신용서지보호장치(Telecommunication Surge Protective Devices)의 설치는 해마다 증가하고 있다. 이에 따른 제품개발도 급속도로 이루어지고 있으며, 과거 몇년 전만해도 서지보호장치에 대한 표준과 시험설비의 이해와 부족으로 인해 표준에 의한 제품검증이 어려웠으나 2013년 제정된 KS 표준(KS C IEC 61643-11)으로 상당수 제조자가 관련인증을 취득하고 있다. 이 논문에서는 KS표준에서 정의하고 있는 열안전성시험에 대한 방법과 결과판정 및 새로운 기준을 제시하고자 한다.

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Reduction of Test Data and Power in Scan Testing for Digital Circuits using the Code-based Technique (코드 기반 기법을 이용한 디지털 회로의 스캔 테스트 데이터와 전력단축)

  • Hur, Yong-Min;Shin, Jae-Heung
    • 전자공학회논문지 IE
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    • v.45 no.3
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    • pp.5-12
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    • 2008
  • We propose efficient scan testing method capable of reducing the test data and power dissipation for digital logic circuits. The proposed testing method is based on a hybrid run-length encoding which reduces test data storage on the tester. We also introduce modified Bus-invert coding method and scan cell design in scan cell reordering, thus providing increased power saving in scan in operation. Experimental results for ISCAS'89 benchmark circuits show that average power of 96.7% and peak power of 84% are reduced on the average without fault coverage degrading. We have obtained a high reduction of 78.2% on the test data compared the existing compression methods.

Characteristic Impedances in Low-Voltage Distribution Systems for Power Line Communication

  • Kim, Young-Sung;Kim, Jae-Chul
    • Journal of Electrical Engineering and Technology
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    • v.2 no.1
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    • pp.29-34
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    • 2007
  • The input and output impedances in a low voltage distribution system is one of the most important matters for power line communication because from the viewpoint of communication, the attenuation characteristic of the high frequency signals is greatly caused by impedance mismatch during sending and receiving. The frequency range is from 1MHz to 30MHz. Therefore, this paper investigates the input and output impedances in order to understand the characteristic of high frequency signals in the low voltage distribution system between a pole transformer and an end user. For power line communication, the model of Korea's low voltage distribution system is proposed in a residential area and then the low voltage distribution system is set up in a laboratory. In the low voltage distribution system, S parameters are measured by using a network analyzer. Finally, input and output impedances are calculated using S parameters.

The study for electrical life test circuit design of Low-voltage magnetic switch (저압 전자개폐기의 전기적 수명 시험회로 설계에 관한 연구)

  • Na, Chil-Bong;Ham, Gil-Ho;Oh, Joon-Sick
    • Proceedings of the KIEE Conference
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    • 2001.07b
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    • pp.757-759
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    • 2001
  • 전동기 전원 개폐를 주목적으로 하는 전자개폐기는 빈번하고 불규칙한 개폐동작에 의해 발생되는 Arc 에너지에 대해 전기적으로 내구성능을 확보하는 것이 중요하다. 또한, 전기적 내구 성능은 수명과 품질을 결정하는 요인으로서 선진업체에서는 내구성능을 향상시키려 연구개발 활동에 집중하고 있다. 이러한 전기적 내구 성능을 향상, 평가하기 위해서는 장기간에 걸친 시험 기간과 시험규격에서 요구하는 조건을 만족시키는 시험 회로와 설비구성이 필수적이다. 여기서는 전기적 내구 성능에 대한 이해와 시험규격을 통한 시험회로 설계 및 설비제작에 대해 설명하고 시험결과를 분석하고자 한다.

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The study of EMC test for low-voltage circuit-breakers with electronic over-current protection according to IEC947-2 (IEC947-2에 따른 전자식 저압 차단기의 EMC 시험 고찰)

  • Oh, Joon-Sick;Kim, Myoung-Seok;Han, Gyu-Hwan
    • Proceedings of the KIEE Conference
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    • 2002.11d
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    • pp.151-153
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    • 2002
  • 전자화 기기의 신뢰성이 요구되는 산업환경에서 외부잡음, 방사잡음, 전도 노이즈 등으로 인한 제품의 오동작 및 기능장해 문제가 발생되고 있다. 저압용 배선용 차단기 또한 네트워크를 통한 통신, 감시(monitoring). 제어(control) 둥의 기능을 구현하기 위한 전자회로를 탑재한 전자식 제품의 개발이 활발이 이루어지고 있으며 정화한 시험을 통한 검증이 필요하다. 본 논문에서는 전자회로 트림장치를 가진 전자식 차단기에 대한 IEC947-2에서 요구하는 EMC 시험방법을 고찰하고자 한다.

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Low Cost SOC(System-On-a-Chip) Testing Method for Reduction of Test Data and Power Dissipation (테스트 데이터와 전력소비 단축을 위한 저비용 SOC 테스트 기법)

  • Hur Yongmin;Lin Chi-ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.12
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    • pp.83-90
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    • 2004
  • This paper proposes an efficient scan testing method for compression of test input data and reduction of test power for SOC. The proposed method determines whether some parts of a test response can be reused as a part of next input test data on the analysis of deterministic test data and its response. Our experimental results show that benchmark circuits have a high similarity between un-compacted deterministic input test data and its response. The proposed testing method achieves the average of 29.4% reduction of power dissipation based on the number of test clock and 69.7% reduction of test data for ISCAS'89 benchmark circuits.

Testing of Advanced Relaying and Design of Prototype IED for Power Transformer Protection (전력용 변압기 보호용 시제품 IED 설계와 개선된 기법의 시험)

  • Park, Chul-Won;Shin, Myong-Chul
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.55 no.1
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    • pp.6-12
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    • 2006
  • A popular method used by primary protection for power transformer is current ratio differential relaying (RDR) with 2nd harmonic restraints. In modern power transformer due to the use of low-loss amorphous material, the 2nd harmonic component during inrush is significantly reduced. The higher the capacitance of the high voltage status and underground distribution, the more the differential current includes the 2nd harmonic component during internal fault. Thus the conventional method may not operate properly. This paper proposes an advanced relaying algorithm and the prototype IED hardware design and it's real-time experimental results. To evaluate performance of the proposed algorithm, the study is well constructed power system model including power transformer utilizing the EMTP software and the testing is made through simulation of various cases. The proposed relaying that is well constructed using DSP chip and microprocessor etc. has been developed and the prototype IED has been verified through on-line testing. The results show that an advanced relaying based prototype IED never mis-operated and correctly identified all the faults and that inrushes that are applied.