• Proceedings of the KSME Conference
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• 2008.11b
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• pp.2495-2500
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• 2008

We simulated the mixing characteristics in micro T-channel using Lattice Boltzmann Method. We studied the relation a mixing length and pressure-drop due to inlet and outlet ration in Reynolds number 0.5, Peclet number 500 and Schmidt 1000. The ratio of a down-inlet to up-inlet was $0.5{\sim}1.5$ times, up-inlet to outlet was $1{\sim}3$ times and outlet length was 250 times to up-inlet. The mixing length decrease linearly as outlet ratio decreased, and pressure-drip increase non-linearly. Initial stage of micro channel mixture was fast by down-inlet ratio, however, the mixing length is not influence.

• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.1289-1291
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• 1993

The hydrogenation effects on characteristics of polycrystalline silicon thin film transistors(poly-Si TFT's) of which the channel length varies from $2.5{\mu}m\;to\;20{\mu}m$ and poly-Si layer thickness is 50, 100, and 150 nm was investigated. After 1 hr hydrogenation annealing by PECVD, the threshold voltage shift decreased dependent on the channel length, but channel width may not alter the threshold voltage shift. In addition to channel length, the active poly-Si layer thickness may be an important parameter on hydrogenation effects, while gate poly-Si thickness may do not influence on the characteristics of TFT's. Considering our experimental results, we propose that channel length and active poly-Si layer thickness may be a key parameters of hydrogenation of poly-Si TFT's.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.35T no.1
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• pp.14-21
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• 1998

In the conventional GaAs MESFET circuit simulation, the DC and transient simulation results are often failed due to the discontinuities of the first and second order derivatives arising from the use of separate models in linear, saturation, and transition regions. In this paper, we propose a unified drain current-voltage model by using a unified channel length modulation effect that is derived by extending the channel length modulation effect in the saturation region to the linear region. Calculated results from the proposed drain current-voltage model agree well with the results of Shur model. Also, we propose a unified capacitance model for linear, transition, and saturation regions by using a unified channel length modulation effect. Its results from the proposed capacitance model agree well with 2-D device simulation results. Thus, the proposed models are expected to be useful in circuit simulations.

• Transactions on Electrical and Electronic Materials
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• v.7 no.3
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• pp.99-102
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• 2006

The electrical characteristics of CMOS inverter with LDMOSFET are studied for high power and digital circuit application by using two dimensional MEDICI simulator. The simulation is done in terms of voltage transfer characteristic and on-off switching properties of CMOS inverter with variation of channel length and channel doping levels. The channel which surrounds a junction-type source in LDMOSFET is considered to be an important parameter to decide a circuit operation of CMOS inverter. The digital logic levels of input voltage show to increase with increase of n-channel length and doping levels while the logic output levels show to the almost constant.

• Journal of computational fluids engineering
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• v.7 no.3
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• pp.53-59
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• 2002

A two-dimensional laminar flow through a channel with a pair of symmetric vertical fins is investigated. At far up- and down-stream from the fins, the plane Poiseuille flow exists in the channel. The Stokes flow for this channel is first investigated analytically and then the other laminar flows by numerical method. For analytic method, the method of eigen function expansion and collocation method are employed. In numerical solution for laminar flows, finite difference method(FDM) is used to obtain vorticity and stream function. From the results, the streamline patterns are shown and the additional pressure drop due to the attached fins and the force exerted on the fin are calculated. It is clear that the force depends on the length of fins and Reynolds number. When the Reynolds number exceeds a critical value, the flow becomes asymmetric. This critical Reynolds number Re/sub c/ depends on the length of the fins.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.2
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• pp.156-163
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• 2008

We proposed a new $p^+/n^+$ gate locally-separated-channel (LSC) bulk FinFET which has vertically formed oxide region in the center of fin body, and device characteristics were optimized and compared with that of normal channel (NC) FinFET. Key device characteristics were investigated by changing length of $n^+$ poly-Si gate ($L_s$), the material filling the trench, and the width and length of the trench at a given gate length ($L_g$). Using 3-dimensional simulations, we confirmed that short-channel effects were properly suppressed although the fin width was the same as that of NC device. The LSC device having the trench non-overlapped with the source/drain diffusion region showed excellent $I_{off}$ suitable for sub-50 nm DRAM cell transistors. Design of the LSC devices were performed to get reasonable $L_s/L_g$ and channel fin width ($W_{cfin}$) at given $L_gs$ of 30 nm, 40 nm, and 50 nm.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.2
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• pp.401-406
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• 2015

The change of subthreshold swing for channel length of asymmetric double gate(DG) MOSFET has been analyzed. The subthreshold swing is the important factor to determine digital chracteristics of transistor and is degraded with reduction of channel. The subthreshold swing for channel length of the DGMOSFET developed to solve this problem is investigated for channel thickness, oxide thickness, top and bottom gate voltage and doping concentration. Especially the subthreshold swing for asymmetric DGMOSFET to be able to be fabricated with different top and bottom gate structure is investigated in detail for bottom gate voltage and bottom oxide thickness. To obtain the analytical subthreshold swing, the analytical potential distribution is derived from Possion's equation, and Gaussian distribution function is used as doping profile. As a result, subthreshold swing is sensitively changed according to top and bottom gate voltage, channel doping concentration and channel dimension.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.8
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• pp.9-16
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• 2000

MOS transistors are fabricated and evaluated for RF IC applications such as mobile communication systems using 0.35m CMOS process. Characteristics of MOSFETs are analyzed at various channel length, width and bias conditions. From the analysis, cut-off frequency ($f_T$) is independent on channel width but maximum oscillation frequency ($f_{max}$) tends to derease as the channel width increases. As channel length increases, $f_T$ and fmax decrease. $f_T$ is 22GHz and fmax is 28GHz at its maximum value. High frequency noise performance is improved with larger channel width and smaller channel length at same bias conditions. NFmin at 2GHz is 0.45dB as a minimum value. From the evaluation, MOSFETs designed using 0.35m CMOS process demonstrated a full potential for the commercial RF ICs for mobile communication systems near 2GHz. And optimization methods of the CMOS transistors for RF applications are presented in this paper.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.3
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• pp.213-223
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• 2013

A unified channel thermal noise model valid in all operation regions is presented for short channel MOS transistors. It is based on smooth interpolation between weak and strong inversion models and consistent physical model including velocity saturation, channel length modulation, and carrier heating. From testing for noise benchmark and comparing with published noise data, it is shown that the proposed noise model could be useful in simulating the MOSFET channel thermal noise in all operation regions.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.5
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• pp.1592-1596
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• 2010

According to the increase of the channel length with fixed width/length, characteristic curves of drain current as a function of gate bias voltage of indium gallium zinc oxide (IGZO) thin-film transistors moved to a positive direction of gate voltage, and field-effect mobility decreased. In case of fixed length and width of channel, field-effect mobility was lower and subthreshold slope was larger when drain bias voltage was higher. Due to large work function of IGZO, band bending at the junction region between IGZO channel and source/drain electrodes was expected to be in opposite direction to that between silicon and metal electrodes; this could explain the above results.