• Title/Summary/Keyword: LTPS TFTS

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GOLDD 구조를 갖는 LTPS TFT 소자의 전기적 특성 비교분석

  • Kim, Min-Gyu;Jo, Jae-Hyeon;Lee, Jun-Sin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.11a
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    • pp.40-40
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    • 2009
  • The electrical characteristic of the conventional self-aligned polycrystalline silicon (poly-Si) TFTs are known to present several undesired effects such as large leakage current, kink effect and hot-carrier effects. In this paper, LTPS TFTs with different GOLDD length were fabricated and investigated the effect of the GOLDD. GOLDD length of 1, 1.5 and $2{\mu}m$ were used, while the thickness of the gate dielectrics($SiN_x/SiO_2$) was fixed at 65nm(40nm/25nm). The electrical characteristics show that the kink effect is reduced at the LTPS TFTs, and degradation from the hot-carrier effect was also decreased by increasing GOLDD length.

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SELAX Technology for Poly-Si TFTs Integrated with Amorphous-Si TFTs

  • Kaitoh, Takuo;Miyazawa, Toshio;Miyake, Hidekazu;Noda, Takeshi;Sakai, Takeshi;Owaku, Yoshiharu;Saitoh, Terunori
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.903-906
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    • 2008
  • We developed the advanced LTPS (A-LTPS) manufacturing process. The a-Si TFT process was combined with selectively enlarging laser crystallization (SELAX) technology to improve the carrier mobility in the region where the peripheral circuits are to be fabricated. A 2.4-inch IPS-pro LCD panel for personal digital assistant use was successfully fabricated using the developed technology.

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Hysteresis Characteristics in Low Temperature Poly-Si Thin Film Transistors

  • Chung, Hoon-Ju;Kim, Dae-Hwan;Kim, Byeong-Koo
    • Journal of Information Display
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    • v.6 no.4
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    • pp.6-10
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    • 2005
  • The dependence of hysteresis characteristics in low temperature poly-Si (LTPS) thin film transistors (TFTs) on the gate-source voltage (Vgs) or the drain-source voltage (Vds) bias is investigated and discussed. The hysteresis levels in both p-type and n-type LTPS TFTs are independent of Vds bias but increase as the sweep range of Vgs increases. It has been found that the hysteresis in both p-type and n-type LTPS TFTs originated from charge trapping and de-trapping in the channel region rather than at the source/drain edges.

Development of a New Hybrid Silicon Thin-Film Transistor Fabrication Process

  • Cho, Sung-Haeng;Choi, Yong-Mo;Kim, Hyung-Jun;Jeong, Yu-Gwang;Jeong, Chang-Oh;Kim, Shi-Yul
    • Journal of Information Display
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    • v.10 no.1
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    • pp.33-36
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    • 2009
  • A new hybrid silicon thin-film transistor (TFT) fabrication process using the DPSS laser crystallization technique was developed in this study to realize low-temperature poly-Si (LTPS) and a-Si:H TFTs on the same substrate as a backplane of the active-matrix liquid crystal flat-panel display (AMLCD). LTPS TFTs were integrated into the peripheral area of the activematrix LCD panel for the gate driver circuit, and a-Si:H TFTs were used as a switching device of the pixel electrode in the active area. The technology was developed based on the current a-Si:H TFT fabrication process in the bottom-gate, back-channel etch-type configuration. The ion-doping and activation processes, which are required in the conventional LTPS technology, were thus not introduced, and the field effect mobility values of $4\sim5cm^2/V{\cdot}s$ and $0.5cm^2/V{\cdot}s$ for the LTPS and a-Si:H TFTs, respectively, were obtained. The application of this technology was demonstrated on the 14.1" WXGA+(1440$\times$900) AMLCD panel, and a smaller area, lower power consumption, higher reliability, and lower photosensitivity were realized in the gate driver circuit that was fabricated in this process compared with the a-Si:H TFT gate driver integration circuit

Excimer-Laser Annealing for Low-Temperature Poly-Si TFTs

  • Kim, Hyun-Jae
    • Journal of Information Display
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    • v.4 no.4
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    • pp.1-3
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    • 2003
  • For excimer laser annealing (ELA), energy density, number of pulses, beam uniformity, and condition of initial amorphous Si (a-Si) films are significant factors contributing to the final microstructure and the performance of low-temperature polycrystalline Si (LTPS) TFTs. Although the process and equipment have been significantly improved, the environmental factors associated with initial amorphous Si (a-Si) films and process conditions are yet to be optimized.

A Five Mask CMOS LTPS Process With LDD and Only One Ion Implantation Step

  • Schalberger, Patrick;Persidis, Efstathios;Fruehauf, Norbert
    • Journal of Information Display
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    • v.8 no.1
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    • pp.1-5
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    • 2007
  • We have developed a CMOS LTPS process which requires only five photolithographic masks and only one ion doping step. Drain/Source areas of NMOS TFTs were formed by PECVD deposition of a highly doped precursor layer while PMOS contact areas were defined by ion implantation. Single TFTs, inverters, ring oscillators and shift registers were fabricated. N and p-channel devices reached field effect mobilities of $173cm^2$/Vs and $47cm^2$/Vs, respectively.

Device Physics of Low Temperature Poly-Si and Single Grain TFTs

  • Migliorato, P.;Yan, F.;Mo, Y.;Hong, Y.;Ishihara, R.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.309-314
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    • 2004
  • Static and transient behaviour of Low Temperature Poly-Si TFTs (LTPS-TFTs) and Single Grain TFTs (SG- TFTs) are compared 3-D simulation is applied here for the first time to TFTs to account for the structure and twin boundaries in SG-TFTs.

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Development of 200ppi SOG-LCD

  • Kim, Chul-Ho;Kim, Chul-Min;Moon, Kook-Chul;Park, Kee-Chan;Kim, Il-Gon;Joo, Sueng-Yong;Park, Tae-Hyeong;Maeng, Ho-Suk;Jung, Eu-Jin;Kim, Chi-Woo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.85-88
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    • 2004
  • 2-inch qVGA (240${\times}$320) TFT-LCD with integrated 6-bit source driver is reported. The pixel density is over than 200ppi and the operation frequency is about 2.8MHz. In order to improve TFT characteristics, TS-SLS (Two-Shot Sequential Lateral Solidification) technology has been employed. A 1:6 demultiplexing scheme has been successfully implemented in the source driver owing to the superb characteristics of the TS-SLS TFTs, which resulted in small driver circuit area.

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Reverse annealing of boron doped polycrystalline silicon

  • Jin, Beop-Jong;Hong, Won-Eui;Lim, Jung-Yoon;Kim, Deok-Hoi;Uemoto, Tstomu;Kim, Chi-Woo;Ro, Jae-Sang
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1277-1280
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    • 2007
  • Isothermal activation annealing was carried out using boron doped SLS poly-using an RTA system. We observed different behavior of reverse annealing depending on the implantation conditions.

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AMOLED Pixel Circuit with Electronic Compensation for Vth and Mobility Variation in LTPS TFTs (LTPS TFT의 Vth와 mobility 편차를 보상하기 위한 AMOLED 화소 회로)

  • Woo, Doo-Hyung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.4
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    • pp.45-52
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    • 2009
  • We proposed a new pixel circuit and driving method for the large-area, high-luminance AMOLED applications in this study. We designed with the low-temperature poly-silicon(LTPS) thin film transistors(TFTs) that has poor uniformity but stable characteristic. To improve the uniformity of an image, the threshold voltage($V_{TH}$) and the mobility of the TFTs can be compensated together. The proposed method overcomes the previous methods for mobility compensation, and that is profitable for large-area applications. Black data insertion was introduced to improve the characteristics for moving images. AMOLED panel can operate in two compensation mode, so the luminance degradation by mobility compensation can be released. The scan driver for controlling the pixel circuits were optimized, and the compensation mode can be controlled simply by that. Final driving signal has large timing margin, and the panel operates stably. The pixel circuit was designed for 14.1" WXGA top-emission ANGLED panel. The non-uniformity of the designed panel was estimated under 5% for the mobility compensation time of 1us.