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Hysteresis Characteristics in Low Temperature Poly-Si Thin Film Transistors  

Chung, Hoon-Ju (School of Electronic Engineering, Kumoh National Institute of Tech-nology)
Kim, Dae-Hwan (P-Si Process Integration Team, LG. Philips LCD Co., Ltd)
Kim, Byeong-Koo (P-Si Process Integration Team, LG. Philips LCD Co., Ltd)
Publication Information
Journal of Information Display / v.6, no.4, 2005 , pp. 6-10 More about this Journal
Abstract
The dependence of hysteresis characteristics in low temperature poly-Si (LTPS) thin film transistors (TFTs) on the gate-source voltage (Vgs) or the drain-source voltage (Vds) bias is investigated and discussed. The hysteresis levels in both p-type and n-type LTPS TFTs are independent of Vds bias but increase as the sweep range of Vgs increases. It has been found that the hysteresis in both p-type and n-type LTPS TFTs originated from charge trapping and de-trapping in the channel region rather than at the source/drain edges.
Keywords
thin film transistor; poly-Si; hysteresis; AMOLED; residual image;
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