• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.5
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• pp.394-398
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• 2007

A simple doping method to fabricate a very thin channel body of the nano-scaled n-type fin field-effect-transistor (FinFET) by arsenic solid-Phase-diffusion (SPD) process is presented. Using the As-doped spin-on-glass films and the rapid thermal annealing for shallow junction, the n-type source-drain extensions with a three-dimensional structure of the FinFET devices were doped. The junction properties of arsenic doped regions were investigated by using the $n^+$-p junction diodes which showed excellent electrical characteristics. The n-type FinFET devices with a gate length of 20-100 nm were fabricated by As-SPD and revealed superior device scalability.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.133-134
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• 2006

A simple doping method to fabricate a very thin channel body of the n-type fin field-effect-transistor (FinFET) with a 20 nm gate length by solid-phase-diffusion (SPD) process is presented. Using As-doped spin-on-glass as a diffusion source of arsenic and the rapid thermal annealing, the n-type source-drain extensions with a three-dimensional structure of the FinFET devices were doped. The junction properties of arsenic doped regions were investigated by using the $n^+$-p junction diodes which showed excellent electrical characteristics. Single channel and multi-channel n-type FinFET devices with a gate length of 20-100 nm was fabricated by As-SPD and revealed superior device scalability.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.1
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• pp.30-37
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• 2006

In this article, we evaluated the structural merits and the validity of a partially insulated MOSFET (PiFET) through the fabrication of prototype transistors and an 80 nm 512M DDR DRAM with partially-insulated cell array transistors (PiCATs). The PiFETs showed the outstanding short channel effect immunity and off-current characteristics over the conventional MOSFET, resulting from self-induced halo region, self-limiting SID shallow junction, and reduced junction area due to PiOX layer formation. The DRAM with PiCATs also showed excellent data retention time. Thus, the PiFET can be a promising alternative for ultimate scaling of planar MOSFET.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.273-273
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• 2010

Recently, extensive research on hetero-junction arrays has been reported owing to its unique band gaps dissimilar to that of homo-junctions. These hetero-junction devices can be used in laser, solar cells, and various sensors. We report on the facile method to fabricate SWCNTs/SnO2 nanowires hetero-junction arrays on flexible polyimide substrate. Each SWCNT field effect transistor (FET) and SnO2 nanowire FET exhibits the purely p- and n-type charactersistics with ohmic contact properties. Such formed pn-junctions showed rectification behaviors reproducibly with a rectification ratio of ${\sim}3{\times}103$ at 1 V and ideality factors about 12. The pn-junctions also showed a good gate modulation behavior.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.1
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• pp.16-21
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• 2006

A simple doping method to fabricate a very thin channel body of the p-type FinFETs with a 20 nm gate length by solid-phase-diffusion (SPD) process was developed. Using the poly-boron-films (PBF) as a novel diffusion source of boron and the rapid thermal annealing (RTA), the p-type sourcedrain extensions of the FinFET devices with a threedimensional structure were doped. The junction properties of boron doped regions were investigated by using the $p^+-n$ junction diodes which showed excellent electrical characteristics. Single channel and multi-channel p-type FinFET devices with a gate length of 20-100 nm was fabricated by boron diffusion process using PBF and revealed superior device scalability.

• 한국초전도학회:학술대회논문집
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• v.12
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• pp.38-38
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• 2002

• Journal of Advanced Navigation Technology
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• v.6 no.1
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• pp.52-62
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• 2002

Electrical characteristics of two types of 20 GHz Push-Push GaAs MESFET dielectric resonator oscillators having Wilkinson and T-junction power combiners for the output stage have been investigated. The Push-Push oscillator for suppressing fundamental frequency 10 GHz and enhancing 20 GHz has been designed and realized in microstrip configuration on 20 mil thick RT-Duroid(${\varepsilon}_r$=2.52) teflon substrate. Two different types of power combiners, T-junction and Wilkinson, have been considered. Whenever one type of the combiners has been adopted for the output circuit, output power, phase noise and fundamental frequency suppression characteristics of the oscillator have been measured. When the Wilkinson power combiner was used, a maximum output power of 5.67 dBm, a phase noise of -105.5 dBc/Hz at an offset frequency of 100 kHz and a fundamental frequency suppression of -29.33 dBc have been measured. When the T-junction power combiner was used, a maximum output power of -1.17 dBm, a phase noise of -102.2 dBc/Hz at an offset frequency of 100 kHz and a fundamental frequency suppression of -17.84 dBc have been measured.

• Progress in Superconductivity
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• v.3 no.1
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• pp.74-77
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• 2001

We have fabricated a high-Tc superconductive transistor with polyvinylidene fluoride (PVDF) gate electrode on MgO bicrystal Josephson junction by spin-coating method. The PVDF ferroelectric film is found to be suitable fur a gate electrode of the superconductive transistor since it has not only small leakage current but also high dieletric constant at low temperature. For the application of superconducting-FET, we investigated millimeter wave properties (60 GHz band) of the Josephson junction with PVDF gate electrode.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.7
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• pp.613-624
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• 2002

Electrical characteristics of two types of 20 GHz Push-Push GaAs MESFET dielectric resonator oscillators having Wilkinson and T-junction power combiners for the output stage have been investigated and compared. So we have explained that the output power and phase noise properties of the Push-push FET DRO are depending on return loss and isolation characteristics of power combiner at the fundamental and the second harmonic frequencies. A Push-push oscillator for suppressing the fundamental frequency of 10 GHz and enhancing the second harmonic of 20 GHz has been designed and fabricated in microstrip configuration on 20 mil thick RT-Duroid($\varepsilon$$_{r}$ = 2.52) Teflon substrate. Return loss and isolation characteristics of T-junction and Wilkinson have been measured at the fundamental frequency of 10.2 GHz and the second harmonic frequency of 20.5 GHz. At the fundamental frequency, -12 dB return loss and -3.7 dB isolation have been measured for the T-junction power combiner, and -14 dB return loss and -11 dB isolation fur the Wilkinson power combiner. At the second harmonic frequency, -10 dB return loss and -7.5 dB isolation have been obtained for the T-junction power combiner, and -23 dB return loss and -22 dB isolation for the Wilkinson power combiner. As a result, we have confirmed that the oscillator based on the Wilkinson power combiner with better retrun loss and isolation characteristics produces more output power and better phase noise characteristics..

• Journal of IKEEE
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• v.17 no.3
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• pp.360-364
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• 2013

The maximum breakdown voltage's characteristic within the Super Junction MOSFET structure comes from N-Drift and P-Pillar's charge balance. By developing P-Pillar from Planar MOSFET, it was confirmed that the breakdown voltage is improved through charge balance, and by setting the gate voltage at 10V, the characteristic comparisons of Planar MOSFET and Super Junction MOSFET are shown in picture 6. The results show that it had the same breakdown voltage as Planar MOSFET which increased temperature resistance by 87.4% at $.019{\Omega}cm^2$ which shows that by the temperature resistance increasing, the power module's power dissipation improved.