• JSTS:Journal of Semiconductor Technology and Science
• /
• v.15 no.1
• /
• pp.7-15
• /
• 2015

We have investigated electrical properties of graphene/Ge Schottky barrier diode (SBD) fabricated on Ge film epitaxially grown on Si substrate. When decreasing temperature, barrier height decreased and ideality factor increased, implying their strong temperature dependency. From the conventional Richardson plot, Richardson constant was much less than the theoretical value for n-type Ge. Assuming Gaussian distribution of Schottky barrier height with mean Schottky barrier height and standard deviation, Richardson constant extracted from the modified Richardson plot was comparable to the theoretical value for n-type Ge. Thus, the abnormal temperature dependent Schottky behavior of graphene/Ge SBD could be associated with a considerable deviation from the ideal thermionic emission caused by Schottky barrier inhomogeneities.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.5 no.1
• /
• pp.157-165
• /
• 2001

We analyzed the electrical characteristics of platinum silicide schottky junction to develope the voltage swing in Integrated Schottky Logic gates, and simulated the characteristics with the programs in this junctions. Simulation programs for analytic characteristics are the Medichi tool for device structure, Matlab for modeling and SUPREM V for fabrication process. The silicide junctions consist of PtSi and variable silicon substrate concentrations in ISL gates. Input parameters for simulation characteristics were the same conditions as process steps of the device farications process. The analitic electrical characteristics were the turn-on voltage, saturation current, ideality factor in forward bias, and has shown the results of breakdown voltage between actual characteristics and simulation characteristics in reverse bias. As a result, the forward turn-on voltage, reverse breakdown voltage, barrier height were decreased but saturation current and ideality factor were increased by substrates increased concentration variations.

• Journal of Korea Multimedia Society
• /
• v.3 no.5
• /
• pp.535-541
• /
• 2000

In this paper, we analyzed the characteristics of schottky junction to develop the voltage swing of ISL, and simulated the characteristics with the programs at this junctions. Simulation programs for analytic characteristics are the SUPREM V, SPICE, Medichi, Matlab. The schottky junction is rectifier contact between platinum silicide and silicon, the characteristics with programs has simulated the same conditions. The analytic parameters were the turn-on voltage, saturation current, ideality factor in forward bias, and has shown the results of breakdown voltage between actual characteristics and simulation characteristics in reverse bias. As a result, th forward turn-on voltage, reverse breakdown voltage, barrier height were decreased but saturation current and ideality factor were increased by substrates increased concentration variations.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.3 no.1
• /
• pp.1-12
• /
• 2003

This paper describes a study on the abnormal behavior of the electrical characteristics of the (n)GaAs/Ti/Pt/Au Schottky contacts prepared by the two techniques of electron beam deposition and rf sputtering and after an annealing treatment. The samples were characterized by I-V and C-V measurements carried out over the temperature range of 150 - 350 K both in the as prepared state and after a 300 C, 30 min. anneal step. The variation of ideality factor with forward bias, the variation of ideality factor and barrier height with temperature and the difference between the capacitance barrier and current barrier show the presence of a thin interfacial oxide layer along with barrier height inhomogenieties at the metal/semiconductor interface. This barrier height inhomogeneity model also explains the lower barrier height for the sputtered samples to be due to the presence of low barrier height patches produced because of high plasma energy. After the annealing step the contacts prepared by electron beam have the highest typical current barrier height of 0.85 eV and capacitance barrier height of 0.86 eV whereas those prepared by sputtering (at the highest power studied) have the lowest typical current barrier height of 0.67 eV and capacitance barrier height of 0.78 eV.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 1998.05a
• /
• pp.405-408
• /
• 1998

In this paper, We analyzed the current-voltage characteristics with n-type silicon substrates concentration and temperature variations (Room temperature, 5$0^{\circ}C$, 75$^{\circ}C$) in platinum silicide and silicon junction. Measurement electrical parameters are forward turn-on voltage, reverse breakdown voltage, barrier height, saturation current, ideality factor, dynamic resistance acceding to junction concentration of substrates and temperature variations. As a result, the forward turn-on voltage, reverse breakdown voltage, barrier height and dynamic resistance were decreased but saturation current and ideality factor were increased by substrates concentration variations. Reverse breakdown voltage and dynamic resistance were increased by temperature variations.

• Journal of Sensor Science and Technology
• /
• v.5 no.5
• /
• pp.1-10
• /
• 1996

Solar cells made of the edge-defined film-fed growth Si are characterized using current-voltage, surface photovoltage, electron beam induced current, electron microprobe, scanning electron microscopy, and electron backscattering. The weak temperature dependence of the I-V curves in the EFG solar cells is due to a voltage variable shunt resistance giving higher diode ideality factors than the ideal one. The voltage variable shunt resistance is modeled by a modified recombination mechanism which includes carrier tunneling to distributed impurity energy states in the band gap within the space-charge region. The junction integrity and the substrate quality are characterized simultaneously by combining I-V and surface photovoltage (SPV) measurements. The diode ideality factors and the surface photovoltages characterize the junction integrity while the SPV diffusion lengths characterizes the substrate quality. Most of the measured samples show the voltage variable shunt resistance although how serious it is depends on the solar cell efficiency. The voltage variable shunt resistance is understood as one of the most important factors of the degradation of EFG solar cells.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.23 no.8
• /
• pp.587-592
• /
• 2010

We have fabricated schottky barrier diode (SBDs) using polar (c-plane) and non polar (a-, m-plane) n-type 6H-SiC wafers. Ni/SiC ohmic contact was accomplished on the backside of the SiC wafers by thermal evaporation and annealed for 20minutes at $950^{\circ}C$ in mixture gas ($N_2$ 90% + $H_2$ balanced). The specific contact resistance was $3.6{\times}10^{-4}{\Omega}cm^2$ after annealing at $950^{\circ}C$. The XRD results of the alloyed contact layer show that formation of $NiSi_2$ layer might be responsible for the ohmic contact. The active rectifying electrode was formed by the same thermal evaporation of Ni thin film on topside of the SiC wafers and annealed for 5 minutes at $500^{\circ}C$ in mixture gas ($N_2$ 90% + $H_2$ balanced). The electrical properties of SBDs have been characterized by means of I-V and C-V curves. The forward voltage drop is about 0.95 V, 0.8 V and 0.8 V for c-, a- and m-plane SiC SBDs respectively. The ideality factor (${\eta}$) of all SBDs have been calculated from log(I)-V plot. The values of ideality factor were 1.46, 1.46 and 1.61 for c-, a- and m-plane SiC SBDs, respectively. The schottky barrier height (SBH) of all SBDs have been calculated from C-V curve. The values of SBH were 1.37 eV, 1.09 eV and 1.02 eV for c-, a- and m-plane SiC SBDs, respectively.

• Current Photovoltaic Research
• /
• v.2 no.2
• /
• pp.69-72
• /
• 2014

We investigated current-voltage (I-V) and capacitance (C)-V characteristics of solution-processed thin film solar cells, consisting of $Cu(In,Ga)S_2$ and $CuInS_2$ stacked absorber layers. The ideality factors, extracted from the temperature-dependent I-V curves, showed that the tunneling-mediated interface recombination was dominant in the cells. Rapid increase of both series- and shunt-resistance at low temperatures would limit the performance of the cells, requiring further optimization. The C-V data revealed that the carrier concentration of the $CuInS_2$ layer was about 10 times larger than that of the $Cu(In,Ga)S_2$ layer. All these results could help us to find strategies to improve the efficiency of the solution-processed thin film solar cells.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.31A no.1
• /
• pp.71-76
• /
• 1994

Schottky diodes have been fabricated using the SDB wafer, and their characteristics have been investigated. For comparison, conventional planar and etched most structure were made on the same substrate. The ideality factor and barrier height of the fabricated devices are found to be 1.03 and 0.77eV, respectively. Breakdown volttge of the etched mesa Schottky diode has been increased to 180V. whereas it is 90V for the planar diode. Schottky diode with an etched mesa exhibits twice improvement in breaktown voltage.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.15 no.5
• /
• pp.34-38
• /
• 1978

In this Paper, the saturation behavior in the electrical phenomena of the DH Laser diode is explained theoretically using rate equnations. The carrier density approaches to ns gradually well above the threshold and theoretically expected curve of and calculated value of $\Delta$Vj are exactly equal to the experimental results which was observed, as shown. The carrier saturation factor If is proposed and we show k$\beta$ is a measure of the ideality of the sample diode. In the light of relation, the sample diode's idoality increases as f decreases.