• 전력전자학회논문지
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• 제25권3호
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• pp.204-212
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• 2020

In this study, device suitability analysis is performed by comparing the performance of SiC MOSFET and GaN Transistor, which are WBG power semiconductor devices in the induction heating (IH) system. WBG devices have the advantages of low conduction resistance, switching losses, and fast switching due to their excellent physical properties, which can achieve high output power and efficiency in IH systems. In this study, SiC and GaN are applied to a general half-bridge series resonant converter topology to compare the conduction loss, switching loss, reverse conduction loss, and thermal performance of the device in consideration of device characteristics and circuit conditions. On this basis, device suitability in the IH system is analyzed. A half-bridge series resonant converter prototype using the SiC and GaN of a 650-V rating is constructed to verify device suitability through performance comparison and verified through an experimental comparison of power loss and thermal performance.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 하계종합학술대회 논문집
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• pp.191-194
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• 1999

The balanced amplifier is a practical amplifier to, implement a broadband amplifier that has flat gain and good input and output VSWR. Three-stage amplifier design procedure usually divided into three partition satisfying the following requirements : low noise figure, high gain and high power output. FHX35LG HEMT device is used in the design can be obtained low noise figure at the first-stage, MGA82563 MMIC device is used in the design can be maintained high gain at the second-stage, and AHI MMIC device is used in the design can be required high power output at the third-stage. The results of three-stage balanced amplifier show that power gain is about 40㏈, noise figure is less than 1.2㏈ at operating frequency.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.327-330
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• 1998

A 2watts MMIC(Monolithic Microwave Integrated Circuits) SSPA(Solid State Power Amplifiers) for 20GHz band communication systems has been designed, manufactured and measured. The 0.15um pHEMT technologywith the gate size of 400um for single device was used for the fabrication of MMIC Power Amplifier chips. The precision MIC patterns for the peripherals like power combiner/divider and microstrip lines were realized using hard substrate for gold wire/ribbon bonding. The measured data shows that this MMIC SSPA has the linear gain of 18dB, output power of 33.42dBm(2.2Watts)at 20~21GHz.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 I
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• pp.434-437
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• 2003

In this paper, we have developed a frequency mixer for the microwave phase conjugator. The circuit topology is the gate mixer using a pseudomorphic HEMT device. The operating frequencies are 4.0 GHz 2.01 GHz, and 1.99 GHz for LO, RF, and IF, respectively. Conversion gain is measured to be 12 dB and 1 dB compression point -34 dBm at the LO power of -4 dBm.

• 한국진공학회지
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• 제22권6호
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• pp.335-340
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• 2013

본 논문은 InP 식각정지층을 갖는 MHEMT 소자의 항복전압을 증가시키기 위한 시뮬레이션 설계 논문이다. MHEMT 소자의 게이트 리세스 구조 및 채널 구조를 변경하여 시뮬레이션을 수행하였고 비교 분석하였다. MHEMT 소자의 드레인 측만을 완전히 제거한 비대칭 게이트 리세스 구조인 경우 $I_{dss}$ 전류가 90 mA에서 60 mA로 줄어들지만 항복 전압은 2 V에서 4 V로 증가함을 확인하였다. 이는 $Si_3N_4$ 보호층과 InAlAs 장벽층 사이의 계면에서 형성되는 전자-포획 음의 고정전하로 인해 채널층에서의 전자 공핍이 심화되어 나타나는 현상으로 이는 채널층의 전류를 감소시켜 충돌이온화를 적게 형성시켜 항복전압을 증가시킨다. 또한, 동일한 구조의 비대칭 게이트 리세스 구조에서 채널층을 InGaAs/InP 복합 채널로 바꾸어 설계한 구조에서는 항복전압이 5 V로 증가하였다. 이는 높은 드레인 전압에서 InP 층의 적은 충돌이온화와 이동도로 인해 전류가 더 감소했기 때문이다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권5호
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• pp.490-496
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• 2015

We have grown AlN/GaN heterostructure which is a promising candidate for mm-wave applications. For the growth of the high quality very thin AlN barrier, indium was introduced as a surfactant at the growth temperature varied from 750 to $1070^{\circ}C$, which results in improving electrical properties of two-dimensional electron gas (2DEG). The heterostructure with barrier thickness of 7 nm grown at of $800^{\circ}C$ exhibited best Hall measurement results; such as sheet resistance of $215{\Omega}/{\Box}$electron mobility of $1430cm^2/V{\cdot}s$, and two-dimensional electron gas (2DEG) density of $2.04{\times}10^{13}/cm^2$. The high electron mobility transistor (HEMT) was fabricated on the grown heterostructure. The device with gate length of $0.2{\mu}m$ exhibited excellent DC and RF performances; such as maximum drain current of 937 mA/mm, maximum transconductance of 269 mS/mm, current gain cut-off frequency of 40 GHz, and maximum oscillation frequency of 80 GHz.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권2호
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• pp.117-123
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• 2004

A 30 nm $In_{0.7}GaAs$ High Electron Mobility Transistor (HEMT) with triple-gate has been successfully fabricated using the $SiO_2/SiN_x$ sidewall process and BCB planarization. The sidewall gate process was used to obtain finer lines, and the width of the initial line could be lessened to half by this process. To fill the Schottky metal effectively to a narrow gate line after applying the developed sidewall process, the sputtered tungsten (W) metal was utilized instead of conventional e-beam evaporated metal. To reduce the parasitic capacitance through dielectric layers and the gate metal resistance ($R_g$), the etchedback BCB with a low dielectric constant was used as the supporting layer of a wide gate head, which also offered extremely low Rg of 1.7 Ohm for a total gate width ($W_g$) of 2x100m. The fabricated 30nm $In_{0.7}GaAs$ HEMTs showed $V_{th}$of -0.4V, $G_{m,max}$ of 1.7S/mm, and $f_T$ of 421GHz. These results indicate that InGaAs nano-HEMT with excellent device performance could be successfully fabricated through a reproducible and damage-free sidewall process without the aid of state-of-the-art lithography equipment. We also believe that the developed process will be directly applicable to the fabrication of deep sub-50nm InGaAs HEMTs if the initial line length can be reduced to below 50nm order.

• Transactions on Electrical and Electronic Materials
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• 제14권1호
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• pp.32-35
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• 2013

In this paper, a manufacturing process was developed for fabricating high-quality AlGaN/GaN high electron mobility transistors (HEMTs) on silicon carbide (SiC) substrates. Various conditions and processing methods regarding the ohmic contact and pre-metal-deposition $BCl_3$ etching processes were evaluated in terms of the device performance. In order to obtain a good ohmic contact performance, we tested a Ti/Al/Ta/Au ohmic contact metallization scheme under different rapid thermal annealing (RTA) temperature and time. A $BCl_3$-based reactive-ion etching (RIE) method was performed before the ohmic metallization, since this approach was shown to produce a better ohmic contact compared to the as-fabricated HEMTs. A HEMT with a 0.5 ${\mu}m$ gate length was fabricated using this novel manufacturing process, which exhibits a maximum drain current density of 720 mA/mm and a peak transconductance of 235 mS/mm. The X-band output power density was 6.4 W/mm with a 53% power added efficiency (PAE).

• 반도체디스플레이기술학회지
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• 제12권4호
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• pp.21-25
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• 2013

This paper is for enhancing the breakdown voltage of MHEMTs with an InP-etchstop layer. The fully removed recess structure in the drain side of MHEMT shows that the breakdown voltage enhances from 2 V to 4 V in the previous work. This is because the surface effect at the drain side decreases the channel current and the impact ionization in the channel at high drain voltage. In order to increase the breakdown voltage at the same asymmetric gate-recess structure, the InGaAs channel structure is replaced with the InGaAs/InP composite channel in the simulation. The simulation results with InGaAs/InP channel show that the breakdown voltage increases to 6V in the MHEMT as the current decreases. In this paper, the simulation results for the InGaAs/InP channel are shown and analyzed for the InGaAs/InP composite channel in the MHEMT.

• 한국전자파학회논문지
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• 제13권10호
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• pp.1083-1088
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• 2002

본 논문에서는 ISM대역에서 사용 가능한 5.8 GHz 고이득 증폭기를 MMIC로 설계 제작하였다. 능동소자로는 HEMT를 사용하였으며, 수동소자로는 spiral 인덕터 와 metal insulator metal 커패시터를 이용한 개별소자를 사용하였다. 고이득 증폭기의 안정도를 해결하기 위하여 RC 귀환회로를 사용하였으며 4단 증폭기를 사용하여 31 dB의 이득을 얻었다. 고이득 증폭기이므로 layout 시 수동 소자간의 결합효과에 의한 발진을 방지하기 위하여 소자간의 거리를 가능한 한 멀리하고, 입력단과 출력단 사이에 비아 접지를 두어 소자간의 결합효과를 최소화하였다.