High 30nm Triple-Gate HEMTs with Damage-Free Sidewall Process and BCB Planarization |
Kim, Dae-Hyun
(ISRC & School of Electrical and Computer Engineering, Seoul National University)
Yeon, Seong-Jin (ISRC & School of Electrical and Computer Engineering, Seoul National University) Song, Saegn-Sub (ISRC & School of Electrical and Computer Engineering, Seoul National University) Lee, Jae-Hak (WAVICS, Co., Ltd.) Seo, Kwang-Seok (ISRC & School of Electrical and Computer Engineering, Seoul National University) |
1 | D. H. Kim, S. J. Kim, Y. H. Kim and K. S. Seok, 'Damage-Free SiO2/SiNx Side-wall Gate Process and its application to 40nm InGaAs/InAlAs HEMT's with 65% InGaAs Channel', Proc. Int. Indium Phosphide and Related Materials (IPRM), pp. 61-64, Santa Barbara, USA, 2003 |
2 | D. H. Kim, S. W. Kim, S. C. Hong, S. W. Paek, J. H. Lee, K. W. Jung and K. S. Seo, 'Fabrication and Characterization of InAlAs/InGaAs MHEMT's with Inverse Step-Graded InAlAs Buffer on GaAs substrate,' Journal of Semiconductor Technology and Science, vol. 1, no. 2, pp. 111-115, 2001 과학기술학회마을 |
3 | K. Shinohara, Y. Yamashta, A. Endoh, K. Hikosaka, T. Matsui, T. Mimura and S. Hiyamizu, 'Extremely High-Speed Lattice-Matched InGaAs/InAlAs High Electron Mobility Transistors with 472GHz Cutoff frequency,' Japanese Journal of Applied Physics, vol. 41, pp. L437-L439, 2002 DOI ScienceOn |
4 | G. -W. Wang, Y. -K. Chen, W. J. Schaff, and L. F. Eastman, 'A MODFET fabricated on GaAs substrate,'IEEE Trans. Electron Devices, vol. 35, pp. 818-823, 1988 DOI ScienceOn |
5 | P. C. Chao, A. J. Tessmer, K. G. Duh, P. Ho, M. Kao, P. M. Smith, J. M. Ballingall, S. M. J. Liu and A. A. Jabra, 'W-Band Low-Noise InAlAs/InGaAs Lattice-matched HEMT's,' IEEE Electron Device Lett., vol. 11, pp. 59-62, Jan., 1990 DOI ScienceOn |
6 | P. M. Smith, 'InP-based HEMTs for microwave and millimeter-wave applications', in Proc. Indium Phosphide and related Conf., Sapporo, Japan, pp. 9-13, 1995 DOI |
7 | T. Suemitsu, H. Yokoyama, T. Ishii, T. Enoki, G. Meneghesso and E. Zanoni, '30-nm Two-Step Recess Gate InP-Based InAlAs/InGaAs HEMTs', IEEE Trans. Electron Devices, vol. 49, No. 10, pp. 1694-1700, 2002 DOI ScienceOn |
8 | Y. Yamashita, A. Endoh, K. Shinohara, M. Higashiwaki, K. Hikosaka and T. Mimura, 'Ultra-Short 25nm-Gate Lattice-Matched InAlAs/InGaAs HEMTs within the Range of 400GHz Cutoff frequency,'IEEE Trans. Electron Device Letters, vol. 22, no. 8, pp. 367-369, 2001 DOI ScienceOn |
9 | M. Ono, M. Saito, T. Yoshitomi, C. Fiegna, T. Ohguro, H. Iwai, 'Sub-50nm gate length n-MOSFETs with 10nm phoshorus source and drain junctions' IEEE ElectronDevices Meeting (IEDM), pp. 5-8, Dec. 1993 DOI |