• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.04a
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• pp.187-190
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• 2000

We fabricated general photo diode, surface etched photo diode and floating gate MOSFET by CMOS process. In a design stage, we expect that surface etched photo diode will be improved as to photo sensitivity. However, because the surface of silicon was damaged in etching process, the surface etched diode had a high dark current as well as low photo current level. Finally, we examined the current-voltage properties for the floating gate MOSFET on n-well and confirmed that the device can be act as an efficient photo-sensor. The floating gate MOSFET was operated in parasitic bipolar transistor mode.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.855-858
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• 1998

Many semiconductive switches are operated in series for high voltage operation. The same number of gate drivers are needed to control all the switches, hence, the drivers cause high cost and system complexity. In this study, a simple and low cost gate driver for high voltage thyristor diode switches is investigated. This gate driver can operate several high voltage thyristor diode switches at the same time.

• Proceedings of the KIEE Conference
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• 1998.07f
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• pp.2133-2135
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• 1998

Many semiconductive switches are operated in series for high voltage operation. The same number of gate drivers are needed to control all the switches, hence, the drivers cause high cost and system complexity. In this study, a simple and low cost gate driver for high voltage thyristor-diode switches is investigated. This gate driver can operate several high voltage thyristor-diode switches at the same time.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1340-1343
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• 2007

We have simultaneously fabricated LTPS TFTs and integrated photodiodes on the same glass substrates without any additional LTPS process. The structure of an integrated photodiode is a lateral p-i-n diode with a gate. The performances of a photodiode were improved at a negative gate voltage.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.2
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• pp.485-490
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• 2010

We propose the equivalent circuit model including all parasitic components in input gate of sense amplifier of DDI DRAM with butting contact structure. We analysed the effect of parasitic schottky diode by using the proposed model in the operation of sense amplifier. The cause of single side fail and the temperature dependence of fail rate in DDI DRAM are due to creation of the parasitic schottky diode in input gate of sense amplifier. The parasitic schottky diode cause the voltage drop in input gate, and result in decreasing noise margin of sense amplifier. therefore single side fail rate increase.

• ETRI Journal
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• v.35 no.4
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• pp.603-609
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• 2013

In this paper, we present a 600-V reverse conducting insulated gate bipolar transistor (RC-IGBT) for soft and hard switching applications, such as general purpose inverters. The newly developed RC-IGBT uses the deep reactive-ion etching trench technology without the thin wafer process technology. Therefore, a freewheeling diode (FWD) is monolithically integrated in an IGBT chip. The proposed RC-IGBT operates as an IGBT in forward conducting mode and as an FWD in reverse conducting mode. Also, to avoid the destructive failure of the gate oxide under the surge current and abnormal conditions, a protective Zener diode is successfully integrated in the gate electrode without compromising the operation performance of the IGBT.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.7
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• pp.580-583
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• 2009

This paper introduces a gate drive IC for power modules with shoot-through immunity. A new approach uses a bootstrap diode as a high-side voltage bias and a level shift function at the same time. Therefore, the gate drive circuit becomes a simple and low-cost without conventional level shift functions such as HVIC(High-Voltage IC), optocoupler and transformer. The proposed gate drive IC is designed and fabricated using the Dongbu-Hitek's 0.35um BD350BA process. It has been tested and verified with IGBT modules.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.04b
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• pp.81-82
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• 2009

This paper introduces a gate drive IC for power modules with shoot-through immunity. A new approach uses a bootstrap diode as a high-side voltage bias and a level shift function at the same time. Therefore, the gate drive circuit becomes a simple and low-cost without conventional level shift functions such as HVIC(High-Voltage IC), optocoupler and transformer. The proposed gate drive IC is designed and fabricated using the Dongbu-Hitek's 0.35um BD350BA process. It has been tested and verified with IGBT modules.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.2
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• pp.152-159
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• 2010

We propose a semi-analytical current conduction model for depletion-mode n-type nanowire field-effect transistors (NWFETs) with top-gate structure. The NWFET model is based on an equivalent circuit consisting of two back-to-back Schottky diodes for the metal-semiconductor (MS) contacts and the intrinsic top-gate NWFET. The intrinsic top-gate NWFET model is derived from the current conduction mechanisms due to bulk charges through the center neutral region as well as of accumulation charges through the surface accumulation region, based on the electrostatic method, and thus it includes all current conduction mechanisms of the NWFET operating at various top-gate bias conditions. Our previously developed Schottky diode model is used for the MS contacts. The newly developed model is integrated into ADS, in which the intrinsic part of the NWFET is developed by utilizing the Symbolically Defined Device (SDD) for an equation-based nonlinear model. The results simulated from the newly developed NWFET model reproduce considerably well the reported experimental results.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.1
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• pp.27-31
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• 2004

Models and simulations of gate tunneling current for thinoxide MOSFETs and Double-Gate SOIs are discussed. A guideline in design of leaky MOS capacitors is proposed and resonant gate tunneling current in DG SOI simulated based on quantum-mechanicalmodels. Gate tunneling current in fully-depleted, double-gate SOI MOSFETs is characterized based on quantum-mechanical principles. The simulated $I_G-V_G$ of double-gate SOI has negative differential resistance like that of the resonant tunnel diodes.