• 제목/요약/키워드: Fabrication Scheduling

검색결과 38건 처리시간 0.023초

반도체 제조 트랙장비의 온라인 스케줄링 방법 (On-Line Scheduling Method for Track Systems in Semiconductor Fabrication)

  • 윤현중;이두용
    • 대한기계학회논문집A
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    • 제25권3호
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    • pp.443-451
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    • 2001
  • This paper addresses an on-line scheduling method for track systems in semiconductor fabrication. A track system is a clustered equipment performing photolithography process in semiconductor fabrication. Trends toward high automation and flexibility in the track systems accelerate the necessity of the intelligent controller that can guarantee reliability and optimize productivity of the track systems. This paper proposes an-efficient on-line scheduling method that can avoid deadlock inherent to track systems and optimize the productivity. We employ two procedures for the on-line scheduling. First, we define potential deadlock set to apply deadlock avoidance policy efficiently. After introducing the potential deadlock set, we propose a deadlock avoidance policy using an on-line Gantt chart, which can generate optimal near-optimal schedule without deadlock. The proposed on-line scheduling method is shown to be efficient in handling deadlock inherent to the track systems through simulation.

반도체 웨이퍼 팹의 에이전트 기반 스케쥴링 방법 (Agent-Based Scheduling for Semiconductor Wafer Fabrication Facilities)

  • 윤현중
    • 대한기계학회논문집A
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    • 제29권11호
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    • pp.1463-1471
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    • 2005
  • This paper proposes an agent-based scheduling method fur semiconductor wafer fabrication facilities with hard inter-operation temporal constraints. The scheduling problem is to find the feasible schedules that guarantee both logical and temporal correctness. A proposed multi-agent based architecture is composed of scheduling agents, workcell agents, and machine agents. A scheduling agent computes optimal schedules through bidding mechanisms with a subset or entire set of the workcell agents. A dynamic planning-based approach is adopted for the scheduling mechanism so that the dynamic behaviors such as aperiodic job arrivals and reconfiguration can be taken into consideration.

반도체 설비의 효율성 제고를 위한 설비 할당 스케줄링 규칙에 관한 연구 (A Study on Deterministic Utilization of Facilities for Allocation in the Semiconductor Manufacturing)

  • 김정우
    • 산업경영시스템학회지
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    • 제39권1호
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    • pp.153-161
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    • 2016
  • Semiconductor manufacturing has suffered from the complex process behavior of the technology oriented control in the production line. While the technological processes are in charge of the quality and the yield of the product, the operational management is also critical for the productivity of the manufacturing line. The fabrication line in the semiconductor manufacturing is considered as the most complex part because of various kinds of the equipment, re-entrant process routing and various product devices. The efficiency and the productivity of the fabrication line may give a significant impact on the subsequent processes such as the probe line, the assembly line and final test line. In the management of the re-entrant process such as semiconductor fabrication, it is important to keep balanced fabrication line. The Performance measures in the fabrication line are throughput, cycle time, inventory, shortage, etc. In the fabrication, throughput and cycle time are the conflicting performance measures. It is very difficult to achieve two conflicting goal simultaneously in the manufacturing line. The capacity of equipment is important factor in the production planning and scheduling. The production planning consideration of capacity can make the scheduling more realistic. In this paper, an input and scheduling rule are to achieve the balanced operation in semiconductor fabrication line through equipment capacity and workload are proposed and evaluated. New backward projection and scheduling rule consideration of facility capacity are suggested. Scheduling wafers on the appropriate facilities are controlled by available capacity, which are determined by the workload in terms of the meet the production target.

대기시간 제약을 고려한 반도체 웨이퍼 생산공정의 스케쥴링 알고리듬 (A Scheduling Algorithm for Workstations with Limited Waiting Time Constraints in a Semiconductor Wafer Fabrication Facility)

  • 주병준;김영대;방준영
    • 대한산업공학회지
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    • 제35권4호
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    • pp.266-279
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    • 2009
  • This paper focuses on the problem of scheduling wafer lots with limited waiting times between pairs of consecutive operations in a semiconductor wafer fabrication facility. For the problem of minimizing total tardiness of orders, we develop a priority rule based scheduling method in which a scheduling decision for an operation is made based on the states of workstations for the operation and its successor or predecessor operation. To evaluate performance of the suggested scheduling method, we perform simulation experiments using real factory data as well as randomly generated data sets. Results of the simulation experiments show that the suggested method performs better than a method suggested in other research and the one that has been used in practice.

반도체 FAB의 스케줄링 시뮬레이터 개발 (Scheduling Simulator for Semiconductor Fabrication Line)

  • 이영훈;조한민;박종관;이병기
    • 산업공학
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    • 제12권3호
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    • pp.437-447
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    • 1999
  • Modeling and system development for the fabrication process in the semiconductor manufacturing is presented in this paper. Maximization of wafer production can be achieved by the wafer flow balance under high utilization of bottleneck machines. Relatively simpler model is developed for the fabrication line by considering main characteristics of logistics. Simulation system is developed to evaluate the line performance such as balance rate, utilization, WIP amount and wafer production. Scheduling rules and input rules are suggested, and tested on the simulation system. We have shown that there exists good combination of scheduling and input rules.

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유전 알고리즘을 이용한 선각 가공 작업일정계획 시스템의 개발에 관한 연구 (Operation Scheduling System for Hull Block Fabrication in Shipbuilding using Genetic Algorithm)

  • 조규갑;김영구;류광렬;황준하;최형림
    • 산업공학
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    • 제11권3호
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    • pp.115-128
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    • 1998
  • This paper presents a development of operation scheduling and reactive operation scheduling system for hull fabrication. The methodology for implementing operation scheduling system is HHGA(Hierarchical Hybrid Genetic Algorithm) which exploits both the global perspective of the genetic algorithm and the rapid convergence of the heuristic search for operation scheduling. The methodology for the reactive operation scheduling is the revised HHGA which consists of manual schedule editor for occurrence of exceptional events and the revised scheduling method used in operation scheduling. As the results of experiment, it has been confirmed that HHGA is able to search good operation scheduling within reasonable time, and the revised HHGA is able to search load-balanced reactive operation scheduling with minimum changes of initial operation schedule within short period of time.

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반도체 Wafer Fabrication 공정에서의 Shift 단위 생산 일정계획 (Shift Scheduling in Semiconductor Wafer Fabrication)

  • 예승희;김수영
    • 산업공학
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    • 제10권1호
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    • pp.1-13
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    • 1997
  • 반도체 Wafer Fabrication 공정은 무수한 공정과 복잡한 Lot의 흐름 등으로 다른 제조 형태에 비해 효율적인 관리가 대단히 어려운 부문이다. 본 연구는 반도체 Fab을 대상으로 주어진 생산 소요량과 목표 공기를 효율적으로 달성하기 위한 Shift 단위의 생산 일정계획을 대상으로 하였다. 특히, 전 공정 및 장비를 고려하기보다는 Bottleneck인 Photo 공정의 Stepper를 중심으로, 공정을 Layer단위로 묶어, 한 Shift에서 어떻게 Stepper를 할당하고 생산계획을 할 것인가를 결정하기 위한 2단계 방법론을 제시하고, Stepper 할당 및 계획에 필요한 3가지 알고리즘들을 제시하였다. 이 기법들을 소규모의 예제들에 대해 적용한 결과와 최적해와의 비교를 통하여 그 성능을 평가하였다.

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다중기계로 구성되는 조립전단계에서의 부품생산 일정계획 (Scheduling on the Pre-assembly Stage of Multiple Fabrication Machines)

  • 윤상흠
    • 산업경영시스템학회지
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    • 제26권4호
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    • pp.63-71
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    • 2003
  • This paper analyses a deterministic scheduling problem concerned with manufacturing multiple types of components at a pre-assembly stage composed of parallel fabrication machines. Each component part is machined on a fabrication machine specified in advance. The manufactured components are subsequently assembled into products. The completion time of a job(product) is measured by the latest completion time of its all components at the pre-assembly stage. The problem has the objective measure of minimizing the total weighted completion time of a finite number of jobs. Two lower bounds are derived and tested in a branch-and-bound scheme. Also, three constructive heuristic algorithms are developed based on the machine aggregation and greedy strategies. Some empirical evaluation of the performance of the proposed branch-and-bound and heuristic algorithms are also performed.

시뮬레이션 기반 적응형 실시간 작업 제어 프레임워크를 적용한 웨이퍼 제조 공정 DEVS 기반 모델링 시뮬레이션 (DEVS-based Modeling Simulation for Semiconductor Manufacturing Using an Simulation-based Adaptive Real-time Job Control Framework)

  • 송해상;이재영;김탁곤
    • 한국시뮬레이션학회논문지
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    • 제19권3호
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    • pp.45-54
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    • 2010
  • 반도체 제조공정에 내재된 복잡성은 작업일정(job scheduling) 문제를 해석적 방법으로는 풀기 어렵기 때문에 보통 시스템 파라미터의 변화에 대한 효과를 이산사건 모델링 시뮬레이션에 의존하여 왔다. 한편 장비 고장 등 예측 불가능한 사건들은 고정된 작업일정 기법을 사용할 경우 전체 공정의 효율을 악화시킨다. 따라서 이러한 불확실성에 대해 최적의 성능을 내기 위해서는 작업일정을 실시간으로 대처 변경하는 것이 필요하다. 본 논문은 반도체 제조 공정에 대해 시스템 제어관점의 접근방법을 적용하여 이 문제에 적응형 실시간 작업제어 틀을 제안하고, DEVS 모델링 시뮬레이션 환경을 기반으로 제안된 틀을 설계 구현하였다. 제안된 방법은 기존의 임기응변적인 소프트웨어적인 방법에 비추어볼 때 전체 시스템을 이해하기 쉬우면서도 또한 추가되는 작업제어 규칙도 쉽게 추가 적용할 수 있는 유연성을 장점으로 가지고 있다. 여러 가지 실험결과 제안된 적응형 실시간 작업제어 프레임워크는 고정 작업규칙 방법에 비해 훨씬 나은 결과를 보여주어 그 효용성을 입증하였다.

반도체 Wafer Fabrication 공정에서의 생산일정계획 (Production Scheduling in Semiconductor Wafer Fabrication Process)

  • 이군희;홍유신;김수영
    • 대한산업공학회지
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    • 제21권3호
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    • pp.357-369
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    • 1995
  • Wafer fabrication process is the most important and critical process in semiconductor manufacturing. The process is very complicated and hard to establish an efficient schedule due to its complexity. Furthermore, several performance indices such as due dates, throughput, cycle time and workstation utilizations are to be considered simultaneously for an efficient schedule, and some of these indices have negative correlations in performances each other. We develop an efficient heuristic scheduling algorithm; Hybrid Input Control Policy and Hybrid Dispatching Rule. Through numerical experiments, it is shown that the proposed Hybrid Scheduling Algorithm gives better performance compared with existing algorithms.

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