• Progress in Superconductivity and Cryogenics
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• v.10 no.1
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• pp.1-5
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• 2008

The effect of $BaCeO_3$ doping on the critical current density of YBCO film by TFA-MOD method was studied. $BaCeO_3$ doping was made by two method; one is direct addition of $BaCeO_3$ nano-sized powder prepared by citrate process followed by grinding with planetary ball mill for 10 hours. Another is addition of Ba-Ce precursor solution prepared with Ba-acetate and Ce acetate dissolved in TFA to the YBCO-TFA precursor solution. The film was made by standard dip coating and heat treatment process with conversion temperature of $790^{\circ}C$ in 1000 ppm oxygen containing moisturized Ar gas atmosphere. The direct addition of $BaCeO_3$ powder resulted in YBCO film with good epitaxial growth and no evidence of second phase formation. The addition through precursor solution resulted in the increase of critical current density upto 30 at% doping and uniform dispersion of $BaCeO_3$ fine inclusion was confirmed by SEM-EDX.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.6
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• pp.758-765
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• 1986

The design, fabrication and performance of vertical double diffused power MOSFET (VDMOS) were described. On the antimony (Sb) doped (~7x10**17 cm**-3) silicon substrate (N+), epitaxial layer(N-) was grown. The thickness and the resistivity of this layer were 32\ulcorner and about 12\ulcorner-cm, respectively. The P- channel length which was controlled by sequential P-/N+ double diffuison method was about 1~2 \ulcorner, and was processed with the self alignment of 21 \ulcorner width poly silicon. To improve the breakdown voltage with constant on-resistance (Ron) about 1\ulcorner, three P+ guard rings were laid out around main pattern. With chip size of 4800\ulcorner x4840 \ulcorner, the VDMOS has shown breakdown voltage of 410~440V, on-resistance within 1.0~1.2\ulcornerand the current capablity of more than 5A.

• New & Renewable Energy
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• v.4 no.2
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• pp.68-73
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• 2008

It is very important that constitution of good hetero-junction interface with a high quality amorphous silicon thin films on very cleaned c-Si wafer for making high efficiency hetero-junction solar cells. For achieving the high efficiency solar cells, the inspection and management of c-Si wafer surface conditions are essential subjects. In this experiment, we analyzed the c-Si wafer surface very sensitively using Spectroscopic Ellipsometer for < ${\varepsilon}2$ > and u-PCD for effective carrier life time, so we accomplished < ${\varepsilon}2$ > value 43.02 at 4.25eV by optimizing the cleaning process which is representative of c-Si wafer surface conditions very well. We carried out that the deposition of high quality hydrogenated silicon amorphous thin films by RF-PECVD systems having high density and low crystallinity which are results of effective medium approximation modeling and fitting using spectroscopic ellipsometer. We reached the cell efficiency 12.67% and 14.30% on flat and textured CZ c-Si wafer each under AM1.5G irradiation, adopting the optimized cleaning and deposition conditions that we made. As a result, we confirmed that spectroscopic ellipsometry is very useful analyzing methode for hetero-junction solar cells which need to very thin and high quality multi layer structure.

• Journal of the Korean Magnetics Society
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• v.9 no.4
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• pp.196-202
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• 1999

The magnetic properties and the microstructures of the Mn-Ir/Ni-Fe multilayers with various stacking structures and buffer layer materials have been investigated. The (111) texture of Mn-Ir/Ni-Fe was observed in the top structures with Ta, Zr, or Ti buffer materials. However, all Mn-Ir/Ni-Fe multilayers with top structures exhibit high $H_{ex}$, regardless of the (111) preferred orientation of Mn-Ir film. The samples whose high $H_{ex}$ observed grain-to-grain epitaxial tendency and the large grain of Mn-Ir film at the interface. It can be explained that the $H_{ex}$ does not depend on the (111) texture of the Mn-Ir film and the interface roughness, but depends on the grain size of the Mn-Ir film and the morphology of the interface between the Mn-Ir and the Ni-Fe grains, and the $H_c$ depends on the interface roughness between the Mn-Ir and the Ni-Fe films.

• IEIE Transactions on Smart Processing and Computing
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• v.3 no.5
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• pp.331-337
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• 2014

Ge is becoming an increasingly popular semiconductor material with high Si compatibility for on-chip optical interconnect technology. For a better manifestation of the meritorious material properties of Ge, its surface treatment should be performed satisfactorily before the electronic and photonic components are fabricated. Ex-situ rapid thermal annealing (RTA) processes with different gases were carried out to examine the effects of the annealing gases on the thin-film quality of Ge grown epitaxially on Si substrates. The Ge-on-Si samples were prepared in different structures using the same equipment, reduced-pressure chemical vapor deposition (RPCVD), and the samples annealed in $N_2$, forming gas (FG), and $O_2$ were compared with the unannealed (deposited and only cleaned) samples to confirm the improvements in Ge quality. To evaluate the thin-film quality, room-temperature photoluminescence (PL) measurements were performed. Among the compared samples, the $O_2$-annealed samples showed the strongest PL signals, regardless of the sample structures, which shows that ex-situ RTA in the $O_2$ environment would be an effective technique for the surface treatment of Ge in fabricating Ge devices for optical computing systems.

• Korean Journal of Materials Research
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• v.22 no.4
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• pp.190-194
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• 2012

The formation of high-quality polycrystalline silicon (poly-Si) on relatively low cost substrate has been an important issue in the development of thin film solar cells. Poly-Si seed layers were fabricated by an inverse aluminum-induced crystallization (I-AIC) process and the properties of the resulting layer were characterized. The I-AIC process has an advantage of being able to continue the epitaxial growth without an Al layer removing process. An amorphous Si precursor layer was deposited on Corning glass substrates by RF magnetron sputtering system with Ar plasma. Then, Al thin film was deposited by thermal evaporation. An $SiO_2$ diffusion barrier layer was formed between Si and Al layers to control the surface orientation of seed layer. The crystallinity of the poly-Si seed layer was analyzed by Raman spectroscopy and x-ray diffraction (XRD). The grain size and orientation of the poly-Si seed layer were determined by electron back scattering diffraction (EBSD) method. The prepared poly-Si seed layer showed high volume fraction of crystalline Si and <100> orientation. The diffusion barrier layer and processing temperature significantly affected the grain size and orientation of the poly Si seed layer. The shorter oxidation time and lower processing temperature led to a better orientation of the poly-Si seed layer. This study presents the formation mechanism of a poly seed layer by inverse aluminum-induced crystallization.

• Resources Recycling
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• v.23 no.1
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• pp.25-32
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• 2014

The purpose of this research is to develop a process and a system to collect, purify and reuse the residual quantity of trimethylgallium, used as a raw material, upon GaN epitaxial growth for LED from a metal organic chemical vapor deposition(MOCVD) equipment. This research reviews whether TMGa collected from the process can be used through a chemical and structural characteristics evaluation. As a result of analyzing the purity using ICP-MS and ICP-AES, 7N high purity (99.99999%) of TMGa was obtained. According to checking the structural change of TMGa through NMR analysis, TMGa having pure $(CH_3)_3Ga$ structure was obtained without structural change. For reliability review of the collected TMGa, u-GaN was deposited using the MOCVD process and an structural, optical and electrical characteristics evaluation was conducted. As a result, it was found out that the reuse was possible.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.4
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• pp.35-42
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• 2013

In this paper, the analog performance of FinFET structure was estimated by extracting the DC/AC characteristics of the 22 nm process FinFET structures with different layout considering spacer and SEG using 3D device simulator, Sentaurus. Based on the analysis results, layout methods to enhance the analog performance of multi-fin FinFET structures are proposed. By adding the spacer and SEG structures, the drive current of 1-fin FinFET increases. However, the unity gain frequency, $f_T$, reduces by 19.4 % due to the increase in the total capacitance caused by the added spacer. If the process element is not included in multi-fin FinFET, replacing 1-finger with 2-finger structure brings approximately 10 % of analog performance improvement. Considering the process factors, we propose methods to maximize the analog performance by optimizing the interconnect and gate structures.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.1
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• pp.21-25
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• 2017

In this study, we have fabricated Schottky barrier diodes (SBD) on single-crystal ${\beta}-Ga_2O_3$ semiconductor that has received much attention for use in next-generation power devices. The SBD had a Pt/Ti/Au Schottky contact on a $2{\mu}m$ Sn-doped low concentration N-type epitaxial layer. The fabricated device exhibited a breakdown voltage of > 180 V, a specific on-resistance of $1.26m{\Omega}{\cdot}cm^2$, and forward current densities of $77A/cm^2$ at 1 V and $473A/cm^2$ at 1.5 V, which proved the potential for use in power device fabrication.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.25 no.6
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• pp.231-238
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• 2015

Sapphire single crystals have been highlighted for epitaxial of gallium nitride films in high-power laser and light emitting diode industries. Among the many crystal growth methods, vertical Bridgman process is an excellent commercial method for growing high quality sapphire crystals with c-axis. In this study, the thermally induced stress in Sapphire during the vertical Bridgman crystal growth process was investigated using a finite element model. A vertical Bridgman process of 2-inch Sapphire was considered for the model. The effects of vertical and transverse temperature gradients on the thermal stress during the process were discussed based on the finite element analysis results.