• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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• pp.5-6
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• 2005

High performance SiGe heterostructure metal-oxide-semiconductor field effect transistors(MOSFETs) were fabricated using well-controlled delta-doping of boron and SiGe/Si heterostructure epitaxal layers grown by reduced pressure chemical vapor deposition. In this paper, we report 1/f noise characteristics of the SiGe MOSFETs measured under various bias conditions of the gate and drain voltages changing in linear operation regions. From the noise spectral density, we found that the gate and drain voltage dependence of the noise represented same features, as usually scaled with $f^1$. However, 1/f noise was found to be much lower in the device with boron delta-doped layer, by a factor of $10^{-1}\sim10^{-2}$ in comparion with the device fabricated without delta-doped layer. 1/f noise property of delta-doped device looks important because the device may replace bipolar transistors most commonly embedded in high-frequency oscillator circuits.

• 한국지반공학회지:지반
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• 제12권5호
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• pp.89-102
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• 1996

지오텍스타일에 의한 압력배수 특성을 연구하기 위하여 성토하중의 증가에 따른 기초지반의 초기압밀 촉진을 유도하기 위한 수직수평 배수공의 모형을 구상하여 실험을 수행하였다. 배수재로 사용된 지오텍스타일의 압축응력이 증가함에 따라 배수공의 누적배수량은 대수함수의 형태로 증가하였다. 수두상승에 따른 각 응력단계별 배수공의 배수량은 직선적으로 증가하였으며 그 증가율은 압축응력이 클수록 작게 나타나는 경향을 보였으며 배수공의 배수량은 포설 겹 수가 많을수록, 지반재료가 세립일수록 크게 나타났다. 지오텍스타일의 전수성과 배수공의 배수량의 관계는 정의 상관관계를 나타내었으며 그 증가율은 지반재료와 수두에 관계없이 거의 동일한 것으로 나타났는바 배수공의 배수능력은 지오텍스타일의 전수성으로 결정됨이 입증되었다.

• ETRI Journal
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• 제37권6호
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• pp.1135-1142
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• 2015

Multilayered ZnO-$SnO_2$ heterostructure thin films consisting of ZnO and $SnO_2$ layers are produced by alternating the pulsed laser ablation of ZnO and $SnO_2$ targets, and their structural and field-effect electronic transport properties are investigated as a function of the thickness of the ZnO and $SnO_2$ layers. The performance parameters of amorphous multilayered ZnO-$SnO_2$ heterostructure thin-film transistors (TFTs) are highly dependent on the thickness of the ZnO and $SnO_2$ layers. A highest electron mobility of $43cm^2/V{\cdot}s$, a low subthreshold swing of a 0.22 V/dec, a threshold voltage of 1 V, and a high drain current on-to-off ratio of $10^{10}$ are obtained for the amorphous multilayered ZnO(1.5nm)-$SnO_2$(1.5 nm) heterostructure TFTs, which is adequate for the operation of next-generation microelectronic devices. These results are presumed to be due to the unique electronic structure of amorphous multilayered ZnO-$SnO_2$ heterostructure film consisting of ZnO, $SnO_2$, and ZnO-$SnO_2$ interface layers.

• 한국도로학회논문집
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• 제9권2호
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• pp.129-140
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• 2007

본 연구의 주목적은 최근 국내 아스팔트 교면포장의 가장 빈번한 파손의 하나인 포트홀의 발생을 저감하기 위해 포장체내에 체류된 수분을 신속히 배수할 수 있는 배수시스템을 개발하는 것이다. 이러한 배수시스템은 방수층과 포장층 사이에 $2{\sim}3cm$의 두께로 박층의 배수층을 구성하는 것으로서 방수층의 내구성 확보와 골재 최대입경 10mm이하의 배수성 혼합물을 박층으로 시공하는 기술이 가장 중요한 사항이다. 이를 위해 본 연구에서는 먼저 NCAT 배합설계법을 바탕으로 10mm 이하 배수성 혼합물을 개발하였고, 다양한 실내시험을 통하여 배수성 혼합물이 모든 품질기준을 만족함을 확인하였다. 방수층의 경우 MMA(Methyl Methacrylate)계 방수제의 적용성을 평가하기 위하여 저온 휨 시험, 접착인장강도 시험 등의 시험을 실시하였고 모든 물성이 기준을 만족하였다. 본 연구에서 개발된 배수시스템의 현장시공성 및 공용성을 평가하기 위하여 고속도로의 1개소 교량에 시험시공을 실시하였다. 시공후 각 포장층 재료에 대한 품질확인 시험결과 모두 기준을 만족하였고 체류수가 원활히 배수되는 것을 확인할 수 있었다.

• 한국전기전자재료학회논문지
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• 제30권10호
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• pp.665-671
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• 2017

Herein, we report the fabrication of low-voltage N-type organic field-effect transistors by using high capacitance fluorinated polymer gate dielectrics such as P(VDF-TrFE), P(VDF-TrFE-CTFE), and P(VDF-TrFE-CFE). Electron-withdrawing functional groups in PVDF-based polymers typically cause the depletion of negative charge carriers and a high contact resistance in N-channel organic semiconductors. Therefore, we incorporated intermediate layers of a low-k polymerto prevent the formation of a direct interface between PVDF-based gate insulators and the semiconducting active layer. Consequently, electron depletion is inhibited, and the high charge resistance between the semiconductor and source/drain electrodes is remarkably improved by the in corporation of solution-processed charge injection layers.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 추계학술대회 논문집 전기물성,응용부문
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• pp.34-35
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• 2006

Transparent ZnO thin film transistor (TFT) is fabricated on the glass substrates. The device consists of a high mobility intrinsic ZnO as a semiconductor active channel, Ga doped ZnO (GZO) as an electrode, $HfO_2$ as a gate insulator. GZO and $HfO_2$ layers are prepared by using a pulsed laser deposition and intrinsic ZnO layers are fabricated by using an rf-magnetron sputtering, respectively. The transparent TFT is highly transparent (> 87 %) and exhibits n-channel, enhancement mode behavior with a field-effect mobility as large as $11.7\;cm^2/Vs$ and a drain current on-to-off ratio of about $10^5$.

• Journal of Information Display
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• 제13권2호
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• pp.61-66
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• 2012

The double-layered Ti/Si barrier metal is demonstrated for the source/drain Cu interconnections in oxide semiconductor thin-film transistors (TFTs). The transmission electromicroscopy and ion mass spectroscopy analyses revealed that the double-layered barrier structure suppresses the interfacial reaction and the interdiffusion at the interface after thermal annealing at $350^{\circ}C$. The underlying Si layer was found to be very useful for the etch stopper during wet etching for the Cu/Ti layers. The oxide TFTs with a double-layered Ti/Si barrier metal possess excellent TFT characteristics. It is concluded that the present barrier structure facilitates the back-channel-etch-type TFT process in the mass production line, where the four- or five-mask process is used.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권4호
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• pp.473-481
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• 2012

For a mesa-isolated small geometry SOI MOSFET, the potentials in the silicon film, front, back, and side-wall oxide layers can be derived three-dimensionally. Using Taylor's series expansions of the trigonometric functions, the derived potentials are written in terms of the natural length that can be determined by using the derived formula. From the derived 3-D potentials, the minimum values of the front and the back surface potentials are derived and used to obtain the closed-form expressions for the front and back gate threshold voltages as functions of various device parameters and applied bias voltages. Obtained results can be found to explain the drain-induced threshold voltage roll-off and the narrow width effect of a fully depleted small geometry SOI MOSFET in a unified manner.

• 한국지반공학회:학술대회논문집
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• 한국지반공학회 2005년도 지반공학 공동 학술발표회
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• pp.417-424
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• 2005

Observed field behaviors are frequently different from the behaviors predicted in the design state due to several uncertainties involved in soil properties, numerical modelling, and error of measuring system even though a sophisticated numerical analysis technique is applied to solve the consolidation behavior of drainage-installed soft deposits. In this study, genetic algorithms are applied to back-analyze the soil properties using the observed behavior of soft clay deposit composed of multi layers that shows complex consolidation characteristics. Utilizing the program, one might be able to appropriately predict the subsequent consolidation behavior from the measured data in an early stage of consolidation of multi layered soft deposits. Example analyses for drainage-installed multi-layered soft deposits are performed to examine the applicability of proposed back-analysis method.

• 한국전기전자재료학회논문지
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• 제14권2호
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• pp.123-129
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• 2001

The optimal high temperature processing conditions for the formation of Ohmic contact of Ti/Al/Pt/Au multiple layers were established for the fabrication of n$^{+}$-GaN/AlGaN/GaN HFET device. Contact resistivity as low as 3.4x10$^{-6}$ ohm-$\textrm{cm}^2$ was achieved by the annealing of the sample at 100$0^{\circ}C$ for 10 sec. using the RTA (Rapid Thermal Annealing) system. The fabricated HFET (Heterostructure Field Effect Transistor) with a structure of n'-GaN/undoped AlGaN/undoped GaN exhibited a low knee voltage of 3.5 V and a maximum source-drain current density of 180 mA/mm at Vg=0V.V.