• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1997년도 추계학술대회 논문집 학회본부
• /
• pp.253-256
• /
• 1997

This paper describes a novel design method for compensating field time-constant of micro-synchronous machine so that its terminal flux can show the same characteristics as large-scale synchronous machine's. In addition to it, the suggested design method can determine the field time-constant regulator's parameters considered the nonlinearities of micro-synchronous machine such as saturation and loading effect. This method applied to 5kVA micro-synchronous machine, and the digital time-constant regulator with digital AVR were designed such that the short field time-constant, $T_{do}'=1.12\;sec$, can take on the large-scale synchronous machine time constant, $T_{do}'=1.47\;sec$. After determining the parameters of controllers, the real time digital time-constant regulator and digital AVR algorithm were implemented by using the PC with Penumum processor, and the usefulness of suggested real time digital time-constant regulator was verified by observing its good performance on the excitation of micro-synchronous machine.

• Journal of Electrical Engineering and Technology
• /
• 제7권6호
• /
• pp.911-917
• /
• 2012

In this paper, a digital speed regulator system design method is developed for a permanent magnet synchronous motor (PMSM). Firstly, an accurate approximate discrete-time model is proposed for a PMSM considering its inherent nonlinearities. Based on the discrete-time model, a digital acceleration observer as well as a digital speed regulator is designed. The exponential stability of the augmented control system is analyzed. The proposed digital speed regulator system is implemented by using a TMS320F28335 floating point DSP. Simulation and experimental results are given to verify the effectiveness of the proposed method.

• ETRI Journal
• /
• 제37권5호
• /
• pp.961-971
• /
• 2015

This paper proposes a 250 mV supply voltage digital low-dropout (LDO) regulator. The proposed LDO regulator reduces the supply voltage to 250 mV by implementing with all digital circuits in a$0.11{\mu}m$ CMOS process. The fast current tracking scheme achieves the fast settling time of the output voltage by eliminating the ringing problem. The over-voltage and under-voltage detection circuits decrease the overshoot and undershoot voltages by changing the switch array current rapidly. The switch bias circuit reduces the size of the current switch array to 1/3, which applies a forward body bias voltage at low supply voltage. The fabricated LDO regulator worked at 0.25 V to 1.2 V supply voltage. It achieved 250 mV supply voltage and 220 mV output voltage with 99.5% current efficiency and 8 mV ripple voltage at $20{\mu}A$ to $200{\mu}A$ load current.

• 제어로봇시스템학회:학술대회논문집
• /
• 제어로봇시스템학회 1997년도 한국자동제어학술회의논문집; 한국전력공사 서울연수원; 17-18 Oct. 1997
• /
• pp.1726-1729
• /
• 1997

In general, the solvability of linear robust output regulation problem are not preserved under time-sampling. Thus, it is found that the digital regulator implemented by itme-sampling of anlog output regulator designed based on the continuous-time linear system model is nothing but a 1st order approximation with respect to time-sampling. By the way, one can design an improved sampled-data regulator with respect to sampling time by utilizing the intrinsic structure of the system. In this paper, we study the system structures which it is possible to design an improved sampled-data regulator with respect to sampling time.

• 대한전기학회논문지
• /
• 제36권6호
• /
• pp.437-443
• /
• 1987

Due to the recent development of microprocessor, the digital control is now in use for the practical structure of the control systems, but it leaves the problem of controlling delays caused by computation time when it is applied to the realization problems, such as application method of the control law and controlling effect of continuous control, etc. This paper deals with robust stability of the digital regulator which compensates for the controlling delays by applying prediction values of state.

• Nuclear Engineering and Technology
• /
• 제53권10호
• /
• pp.3335-3343
• /
• 2021

The impact of gamma radiation on a commercial off the shelf microcontroller board has been investigated. Three different tests have been performed to ascertain the radiation tolerance of the device from a nuclear decommissioning deployment perspective. The first test analyses the effect of radiation on the output voltage of the on-board voltage regulator during irradiation. The second test evaluated the effect of gamma radiation on the voltage characteristics of analogue and digital inputs and outputs. The final test analyses the functionality of the microcontroller when using an external, shielded voltage regulator instead of the on-board voltage regulator. The results suggest that a series of latch-ups occurs in the microcontroller during irradiation, causing increased current drain which can damage the voltage regulator if it does not have short-circuit protection. The analogue to digital conversion functionality appears to be more sensitive to gamma radiation than digital and analogue output functionality. Using an external, shielded voltage regulator can prove beneficial when used for certain applications. The collected data suggests that detaching the voltage regulator can extend the lifespan of the platform up to approximately 350 Gy.

• Journal of Advanced Marine Engineering and Technology
• /
• 제18권2호
• /
• pp.83-90
• /
• 1994

The container crane is still operated by skillfull human operators. So an automatic crane operation system is strongly required. In this paper, the digital control method is applied to position an anti-swing control for container crane. Two methods of digital optimal regulator control and digital redesign control are used for experiment. From these experimental results, it is respected that both methods can be applied effectively to an actual container crane operation.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2000년도 하계학술대회 논문집 B
• /
• pp.1227-1229
• /
• 2000

The output voltage of UPS must not vary according to the load variation But the output voltage varies due to the load variation when a PI voltage regulator is used which has inherently a static state error. This paper presents a static-error-free digital PID voltage regulator for an UPS inverter to overcome additionally the voltage unbalance problem in three Phase system as well as the above problem.

• 한국산학기술학회논문지
• /
• 제13권12호
• /
• pp.5709-5715
• /
• 2012

플라스틱 소재를 사용한 사출성형부품은 차량 경량화뿐만 아니라 충격흡수를 통한 운전자와 보행자 보호, 제품 디자인의 자율성등의 우수한 장점을 가지고 있어 그 사용량이 급속히 증가하고 있다. 유리섬유함유 플라스틱재료를 이용한 레귤레이터 레일의 사출성형시 불량률최소화를 위해 유한요소해석과 실험계획법을 사용하여 성형공정중의 휨변형량(warpage)과 수축변형를 최소화할 수 있는 최적의 성형조건을 제시하고자 한다. 또한 유리섬유의 유동성과 냉각효율의 확보를 위해 최적의 게이트 및 런너방식을 설정한다. 사출금형을 제작하여 제품을 성형제작한 후 휨변형등의 성능확인을 통해 해석방법의 유효성과 최적화의 실효성을 확인하고자 한다.

• ETRI Journal
• /
• 제42권5호
• /
• pp.790-798
• /
• 2020

Herein, a low-ripple coarse-fine digital low-dropout regulator (D-LDO) without ringing in the transient state is proposed. Conventional D-LDO suffers from a ringing problem when settling the output voltage at a large load transition, which increases the settling time. The proposed D-LDO removes the ringing and reduces the settling time using an auxiliary power stage which adjusts its output current to a load current in the transient state. It also achieves a low output ripple voltage using a comparator with a complete comparison signal. The proposed D-LDO was fabricated using a 65-nm CMOS process with an area of 0.0056 μ㎡. The undershoot and overshoot were 47 mV and 23 mV, respectively, when the load current was changed from 10 mA to 100 mA within an edge time of 20 ns. The settling time decreased from 2.1 ㎲ to 130 ns and the ripple voltage was 3 mV with a quiescent current of 75 ㎂.