• Journal of the Korean Society for Nondestructive Testing
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• v.29 no.4
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• pp.299-307
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• 2009

Emerging fiber optic sensor technologies have shown great potential to overcome the difficulties associated with conventional sensors. Fiber optic sensors are immune to EM noise and electric shock and thus can be used in explosion-prone areas. Several kinds of fiber optic sensors have been developed over the last two decades to take advantage of these merits. There have also been many field applications of fiber optic sensors for structural health monitoring as NDT/HDE. However, very few sensors, particularly a load cell have been successfully commercialized. This Paper Presents a load cell using fiber Bra99 gra1ing (FBG) sensors. The shape of the load cell is a link type, and three FBG sensors are used for measuring strains at three different points. Especially, these strains are processed with a differential method in order to exclude common mode noise such as temperature. Moreover, the sensitivity, the linearity and the resolution of the load cell were successfully verified from the experiment of tension test.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.10
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• pp.2369-2379
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• 2013

A CMOS x-ray line scan sensor which is used in both medical imaging and non-destructive diagnosis is designed. It has a pixel array of 512 columns ${\times}$ 4 rows and a built-in DC-DC converter. The pixel circuit is newly proposed to have three binning modes such as no binning, $2{\times}2$ binning, and $4{\times}4$ binning in order to select one of pixel sizes of $100{\mu}m$, $200{\mu}m$, and $400{\mu}m$. It is designed to output a fully differential image signal which is insensitive to power supply and input common mode noises. The layout size of the designed line scan sensor with a $0.18{\mu}m$ x-ray CMOS image sensor process is $51,304{\mu}m{\times}5,945{\mu}m$.

• Proceedings of the Korea Concrete Institute Conference
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• 2008.04a
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• pp.9-12
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• 2008

PSC-I girder is widely used in designing bridge. Currently partial advanced country have constructed bridge with high strength concrete, while in-country rather less concrete strength(40MPa) has been used to build bridge girder. So, this paper presents characteristics and behavior of member casted by high strength concrete to apply practically. For this aim, 4 girders were fabricated to investigate performance and structural behavior. Prior to test, structural analysis was performed with common program. Steel gages and concrete gage were filled up to measure longitudinal and vertical strain of reinforcement and concrete. Linear Variable Differential Transducer and concrete surface gage were also set to measure deflection and strain of concrete. Load-deflection relation and crack mode were analyzed at transfer and test and compared with the structural analysis

• ETRI Journal
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• v.27 no.5
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• pp.473-483
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• 2005

In this paper, we propose two LC voltage-controlled oscillators (VCOs) that improve both phase noise and tuning range. With both 1/f induced low-frequency noise and low-frequency thermal noise around DC or around harmonics suppressed significantly by the employment of a current-current negative feedback (CCNF) loop, the phase noise in the CCNF LC VCO has been improved by about 10 dB at 6 MHz offset compared to the conventional LC VCO. The phase noise of the CCNF VCO was measured as -112 dBc/Hz at 6 MHz offset from 5.5 GHz carrier frequency. Also, we present a bandwidth-enhanced LC VCO whose tuning range has been increased about 250 % by connecting the varactor to the bases of the cross-coupled pair. The phase noise of the bandwidth-enhanced LC-tank VCO has been improved by about 6 dB at 6 MHz offset compared to the conventional LC VCO. The phase noise reduction has been achieved because the DC-decoupling capacitor Cc prevents the output common-mode level from modulating the varactor bias point, and the signal power increases in the LC-tank resonator. The bandwidth-enhanced LC VCO represents a 12 % bandwidth and phase noise of -108 dBc/Hz at 6 MHz offset.

• Journal of Korea Society of Industrial Information Systems
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• v.18 no.5
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• pp.9-14
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• 2013

This paper is designed frequency multiplier with low phase noise using DLL technique. The VCDL is designed using a differential structure to reduce common-mode noise. The proposed frequency multiplier is fabricated in a 65nm, 1.2V TSMC CMOS process, and the operating frequency range from 10MHz to 24MHz was measured. The SSB phase noise is measured to be -125dBc/Hz at 1MHz from 38.4MHz carrier. A total area of $0.032mm^2$were consumed in the chip, including the output buffer. Total current is 1.8mA at 1.2V supply voltage.

• IEIE Transactions on Smart Processing and Computing
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• v.3 no.6
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• pp.416-424
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• 2014

This paper presents an 8-bit pipelined analog-to-digital converter. The supply voltage applied for comparators and other sub-blocks of the ADC were 0.7V and 0.5V, respectively. This low power ADC utilizes the capacitive charge pump technique combined with a source-follower and calibration to resolve the need for the opamp. The differential charge pump technique does not require any common mode feedback circuit. The entire structure of the ADC is based on fully dynamic circuits that enable the design of a very low power ADC. The ADC was designed to operate at 1MS/s in 90nm CMOS process, where simulated results using ADS2011 show the peak SNDR and SFDR of the ADC to be 47.8 dB (7.64 ENOB) and 59 dB respectively. The ADC consumes less than 1mW for all active dynamic and digital circuitries.

• Journal of Biomedical Engineering Research
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• v.26 no.4
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• pp.215-221
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• 2005

We describe the development of a prototype multi-channel electrical impedance tomography (EIT) system. The EIT system can be equipped with either a single-ended current source or a balanced current source. Each current source can inject current between any chosen pair of electrodes. In order to reduce the data acquisition time, we implemented multiple digital voltmeters simultaneously acquiring and demodulating voltage signals. Each voltmeter measures a differential voltage between a fixed pair of adjacent electrodes. All voltmeters are configured in a radially symmetric architecture to optimize the routing of wires and minimize cross-talks. To maximize the signal-to-noise ratio, we implemented techniques such as digital waveform generation, Howland current pump circuit with a generalized impedance converter, digital phase-sensitive demodulation, tri-axial cables with both grounded and driven shields, and others. The performance of the EIT system was evaluated in terms of common-mode rejection ratio, signal-to-noise ratio, and reciprocity error. Future design of a more innovative EIT system including battery operation, miniaturization, and wireless techniques is suggested.

• ETRI Journal
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• v.42 no.5
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• pp.773-780
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• 2020

A 40 nm complementary metal oxide semiconductor carrier-aggregated drive amplifier with high linearity is presented for sub-GHz Internet of Things applications. The proposed drive amplifier consists of two high linear amplifiers, which are composed of five differential cascode cells. Carrier aggregation can be achieved by switching on both the driver amplifiers simultaneously and combining the two independent signals in the current mode. The common gate bias of the cascode cells is selected to maximize the output 1 dB compression point (P1dB) to support high-linear wideband applications, and is used for the local supply voltage of digital circuitry for gain control. The proposed circuit achieved an output P1dB of 10.7 dBm with over 22.8 dBm of output 3rd-order intercept point up to 0.9 GHz and demonstrated a 55 dBc adjacent channel leakage ratio (ACLR) for the 802.11af with -5 dBm channel power. To the best of our knowledge, this is the first demonstration of the wideband carrier-aggregated drive amplifier that achieves the highest ACLR performance.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.10
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• pp.71-79
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• 2008

This paper analyzed the voltage induction phenomena on the telecommunication lines by electromagnetic coupling from high-speed A.C. electrified railway. The induced common mode voltages and the induced differential mode voltage on the telecommunication line was measured by notified standard method in the regulation of Korea. The test lines consist of 2 separated lines of 20 m and 300 m in influence distance each for comparison, with 2km inducing length. The analysis is made on the induced voltages from the different influence distances and the different earthing points, and also on the waveform and spectrum distributions. It is proved that the induction is arisen so good and the measured values are fair enough against noise such as the earth voltage differencing, and the current measuring scheme is also rightful.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2004.04a
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• pp.11-15
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• 2004

This paper deals with EMC filter for a personal computer( PC). A PC contains many sources of noise inside and out, with many connected cables. High noise levels are also emitted from the PC became of high-speed signals. So radiated noise from the computer body may sometimes cause problems. Therefore, we design and fabricate an electromagnetic compatibility (EMC) filter for PC, which is composed of feed-through capacitors and ferrite beads with high permeability. Through extensive test, the proposed EMC filter is shown to have excellent differential-mode and common-mode noises filtering characteristics above 30 dB in the frequency band from 10 MHz to 1.5 GHz. The immunity characteristics are improved more than 10 to 30 dB over the frequency band from DC to 1.8 GHz