• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.1
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• pp.14-21
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• 2009

A digital differential transmitter based on CMOS inverter worked up to 2.8 Gbps at the supply voltage of 1 V with a $0.18{\mu}m$ CMOS process. By calibrating the output impedance of the transmitter, the impedance matching between the transmitter output and the transmission line is achieved. The PVT variations of pre-driver are compensated by the calibration of the rising-edge delay and falling-edge delay of the pre-driver outputs. The chip fabricated with a $0.18{\mu}m$ CMOS process, which uses the standard supply voltage of 1.8 V, gives the highest data rate of 4Gbps at the supply voltage of 1.2 V. The proposed calibration schemes improve the eye opening with the voltage margin by 200% and the timing margin by 30%, at 2.8 Gbps and 1 V.

• Proceedings of the KIEE Conference
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• 1994.11a
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• pp.42-44
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• 1994

This paper presents the method of estimating integral coefficients of new distance relaying algorithm for transmission line protection. The proposed method is based on the differential equation calculates impedance value by approximation of integral term of integro-differential equation which relate voltage with current. As a result, we can determine the integral coefficients in least square error sense in frequency domain and we take into consideration the analog filter characteristics and frequency domain characteristics of the system to be protected. The simulation results showed that these coefficients can be successfully used to obtain impedance value in distance relay.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.45 no.2
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• pp.26-36
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• 2008

Due to the differential and low voltage swing, Low Voltage Differential Signaling(LVDS) has been widely used for high speed data transmission with low power consumption. This paper proposes new LVDS I/O interface circuits for more than 1.3 Gb/s operation. The LVDS receiver proposed in this paper utilizes a sense amp for the pre-amp instead of a conventional differential pre-amp. The proposed LVDS allows more than 1.3 Gb/s transmission speed with significantly reduced driver output voltage. Also, in order to further improve the power consumption and noise performance, this paper introduces an inductance impedance matching technique which can eliminate the termination resistor. A new form of unfolded impedance matching method has been developed to accomplish the impedance matching for LVDS receivers with a sense amplifier as well as with a differential amplifier. The proposed LVDS I/O circuits have been extensively simulated using HSPICE based on 0.35um TSMC CMOS technology. The simulation results show improved power gain and transmission rate by ${\sim}12%$ and ${\sim}18%$, respectively.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.289-292
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• 2001

A Novel fully-differential bipolar current-controlled current amplifier(CCCA) for electrically tunable circuit design at current-mode signal processing were designed. The CCCA was consisted of fully-differential subtracter and fully-differential current gain amplifier. The simulation result shows that the CCCA has current input impedance of 0.5 Ω and a good linearity. The CCCA has 3-dB cutoff frequency of 20 MHz for the range over bias current 100$mutextrm{A}$ to 20 ㎃. The power dissipation is 3 mW.

• Journal of electromagnetic engineering and science
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• v.6 no.4
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• pp.197-202
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• 2006

This paper presents a study on the differential signaling for the rectangular power-bus structure. The full-wave modal analysis method analyzes how the differential-signaling can lower the power-bus resonance noise levels. The methodology is validated by the use of the FDTD method and reference measurements.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.12
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• pp.1084-1096
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• 2016

This paper presents method of design and analysis of a high-speed serial interface connector with a data rate of 12.5 Gbps. A high-speed serial interface connector is composed of various material and complex structures. It is very difficult to match the impedance of each discontinuous portion of connector. Therefore, this paper proposes the structure of a connector line that be simplified a connector. In the structure of proposed connector line, this research presents a method for extracting R, L, C and G parameters, analyzing the differential mode impedance, and minimizing the impedance discontinuity using time domain transmissometry and time domain reflectometry. This paper applies the proposed methods in the connector line to the high-speed serial interface connector. The proposed high-speed serial interface connector, which consists of forty-four pins, is analyzed signal transmission characteristics by changing the width and spacing of the four pins. According to the analysis result, as the width of the ground pin increases, the impedance decreases slightly. And as the distance between the ground pin and the signal pin increases, the impedance increases. In addition, as the width of the signal pin increases, the impedance decreases. And as the distance between the signal pin and the signal pin increases, the impedance decreases. The impedance characteristic of initial connector presents ranges from 96 to $139{\Omega}$. Impedance characteristic after applying the structure of proposed connector is shown as a value between 92.6 to $107.5{\Omega}$. This value satisfies the design objective $100{\Omega}{\pm}10%$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.2
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• pp.61-66
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• 2011

A new via structure on printed circuit board has been proposed for differential signaling in applications of high-speed interconnection. In new structure, the via is physically separated and then divided into two electrically-isolated sections using mechanical drill routing process. These cutted vias are connected respectively to the traces of the differential pair. New via structure makes possible to rout the differential pair using only one via, while conventional via structure needs two vias for interconnection. Because the spacing even in via region keeps almost constant, new via structure can alleviate an impedance discontinuity and then enhance its signal transmission characteristics such as reflection loss and insertion loss. It is expected that new via structure is effective in differential signaling for high-speed interconnection.

• Proceedings of the KIEE Conference
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• 1996.07b
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• pp.677-679
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• 1996

This paper describes a method to improve the speed of a distance relay based on a differential equation of transmission lines using feedforward artificial neural networks (ANN) on an EHV system. For the impedance calculation an integration approximation to the differential equation is used and then an ANN is trained with the impedance convergence characteristic. The ANN predicts the fault distance with some calculated resistances and reactances before they reach trip zone. Thus, the proposed method can improve the speed of distance relays, significantly if a high sampling rate such as 48 samples per cycle is employed.

• Carbon letters
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• v.12 no.3
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• pp.180-183
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• 2011

Li metal is accepted as a good counter electrode for electrochemical impedance spectroscopy (EIS) as the active material in Li-ion and Li-ion polymer batteries. We examined the existence of signal noise from a Li-metal counter quantitatively as a preliminary study. We suggest an electrochemical cell with one switchable electrode to obtain the exact impedance signal of active materials. To verify the effectiveness of the switchable electrode, EIS measurements of the solid electrolyte interphase (SEI) before severe $Li^+$ intercalation to SFG6 graphite (at > ca. 0.25 V vs. Li/$Li^+$) were taken. As a result, the EIS spectra without the signal of Li metal were obtained and analyzed successfully for the following parameters i) $Li^+$ conduction in the electrolyte, ii) the geometric resistance and constant phase element of the electrode (insensitive to the voltage), iii) the interfacial behavior of the SEI related to the $Li^+$ transfer and residence throughout the near-surface (sensitive to voltage), and iv) the term reflecting the differential limiting capacitance of $Li^+$ in the graphite lattice.

• Journal of Biomedical Engineering Research
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• v.16 no.3
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• pp.301-308
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• 1995

A high-precision pre-amplifier is designed for general use in EEG measurement system. It consists of signal generator, signal amplifier with a impedance converter, shield driver, body driver, differential amplifier, and isolation amplifier. The combination of minimum use of inaccurate passive components and the appropriate matching of each monolithic amplifiers results in good noise behavior, low leakage current, high CMRR, high input impedance, and high IMRR. The performance of EEG pre-amplifier has been verified by showing the typical EEG pattevn of a nomad person through the clinical experiments.