• 한국정밀공학회지
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• 제31권12호
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• pp.1077-1083
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• 2014

Multi-material Additive Manufacturing (AM) is being focused to apply for direct manufacturing of a product. In this paper, a three-dimensional circuit device (3DCD) fabrication technology based on the multi-material AM technology was proposed. In contrast with conventional two-dimensional Printed Circuit Board (PCB), circuit elements and conducting wires of 3DCD are placed in threedimensional configuration at multiple layers of the structure. Therefore, 3DCD technology can improve design freedom of an electronic product. In this paper, 3DCD technology is proposed based on AM technology. Two types of 3DCD fabrication systems were developed based on the Stereolithography and the Fused Deposition Modeling technologies. And the 3DCD samples which have same function were fabricated, successfully.

• Applied Science and Convergence Technology
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• 제23권3호
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• pp.134-138
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• 2014

One-dimensional nanostructures such as nanowires have been extensively investigated as a promising type of material for applications of nanoscale technology. The fabrication of single-nanowire devices are consequently important and interesting. This study introduced a feasible method for growing CuO nanowires on Cu foils. The nanowires had diameters of 10~150 nm and lengths of more than $7{\mu}m$ and were grown by means of thermal oxidation in a vacuum. They were entirely and uniformly grown over the Cu foil surfaces and could be extracted and dispersed in an ethanol solution for further purposes. In addition, a simple fabrication method for realizing device functionality from a single CuO nanowire was reported. Fabricated devices were carefully checked by field-emission scanning electron microscopy (SEM). The probability of the realization of a single-CuO-nanowire device relative to that of all other types was estimated to be around 25%. Finally, the I-V characteristics of the devices were analyzed.

• 한국재료학회지
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• 제15권9호
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• pp.613-619
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• 2005

The ever increasing popularity and acceptance in the market place of portable systems, such as cell phones, PDA, notebook PC, etc., are fueling effects in further miniaturizing and lowering power consumption in these systems. The dynamic power consumption due to the CPU activities and the static power consumption due to leakage currents are two major sources of power consumption. Smaller devices and a lower de voltage lead to reducing the power requirement, while better insulation and isolation of devices lead to reducing leakage currents. All these can be harnessed in the SOI (silicon-on-insulator) technology. In this study, the key aspects of the SOI technology, mainly device electrical properties and device processing steps, are briefly reviewed. The interesting materials issues, such as SOI structure formation and SOI wafer fabrication methods, are then surveyed. In particular, the recent technological innovations in two major SOI wafer fabrication methods, namely wafer bonding and SIMOX, are explored and compared in depth. The results of the study are nixed in that, although the quality of the SOI structures has shown great improvements, the processing steps are still found to be too complex. Between the two methods, no clear winner has yet emerged in terms of the product quality and cost considerations.

• 한국생산제조학회지
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• 제19권5호
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• pp.710-715
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• 2010

This study developed an automatic tool change system of the SMA-based tool clamping device for applications of micro-machine tools. This paper first describes clamping and unclamping procedures of the automatic tool change system and its basic configuration. Second, it presents fabrication techniques of components, such as a heating/cooling system and a tool loader. Finally, it describes automatic tool change test conducted with a prototype in which the fabrication techniques of components were employed. As the results of the test, times needed for clamping and unclamping operations were estimated to 18(s) and 8(s) respectively. The experimental results confirm that the proposed automatic tool change system can be sucessfully applied to micro-machine tools.

• 대한전자공학회논문지
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• 제26권11호
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• pp.1706-1711
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• 1989

Unit processes for the fabrication of HEMT(high electron mobility transistor)was studied and the optimum conditions of them were applied to the fabrifcation of a discrete HEMT device. The HEMT with a nominal gate-source spacing of 3.6\ulcorner and a gate length of 2.8\ulcorner showed a transconductance of 46.1mS/mm and a threshold voltage of -0.29V. A source-drain voltage of 2.0V for a saturation current of 35mA/mm was achieved.

• 한국정밀공학회지
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• 제23권7호
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• pp.146-151
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• 2006

In order to increase the productivity of conventional microstereolithography, a new method using a digital micromirror device ($DMD^{TM}$) as the dynamic patter generator is proposed. The deviation from the level of clear optical images to the level of photopolymer surface is a key for the fabrication of an accurate 3D structure, so this deviation is minimized by controlling the viscosity of FA 1260T with organic solvents. After finding the appropriate process variables, the feasibility of microstructure fabrication such as a microgear and a microsphere is demonstrated. Microstereolithography with $DMD^{TM}$ showed the potential to replace the existing focused beam microstereolithography.

• Journal of Electrical Engineering and information Science
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• 제2권4호
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• pp.106-110
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• 1997

A new SOI NMOSFET with a 'LOCOS-like' shape self-aligned polysilicon gate formed on the recessed channel region has been fabricated by a mix-and-match technology. For the first time, a new scheme for implementing self-alignment in both source/drain and gate structure in recessed channel device fabrication was tried. Symmetric source/drain doping profile was obtained and highly symmetric electrical characteristics were observed. Drain current measured from 0.3${\mu}{\textrm}{m}$ SOI devices with V\ulcorner of 0.77V and Tox=7.6nm is 360$mutextrm{A}$/${\mu}{\textrm}{m}$ at V\ulcorner\ulcorner=3.5V and V\ulcorner=2.5V. Improved breakdown characteristics were obtained and the BV\ulcorner\ulcorner\ulcorner(the drain voltage for 1 nA/${\mu}{\textrm}{m}$ of I\ulcorner at V=\ulcorner\ulcorner=0V) of the device with L\ulcorner\ulcorner=0.3${\mu}{\textrm}{m}$ under the floating body condition was as high as 3.7 V. Problems for the new scheme are also addressed and more advanced device structure based on the proposed scheme is proposed to solve the problems.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제50권9호
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• pp.466-470
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• 2001

We have developed a sub-micron gap fabrication technology using chemical-mechanical polishing (CMP) without /the sub-micron lithography equipments (0.18∼0.25 7m). And it has been applied to a lateral field emission device (FED), in which narrow gap distance is very important for reducing turn-on voltage. As a result, the turn-on voltage (at which the current level is 1 nA) of the fabricated device with the gap distance of 256 nm is as low as 4.0 V, which is the lowest turn-on voltage among lateral FEDs ever reported.

• 한국전기전자재료학회논문지
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• 제24권10호
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• pp.794-798
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• 2011

This paper was carried out design of 1,700 V Base Resistance Thyristor for fabrication. We decided conventional BRT (base resistance thyristor) device and Trench Gate type one for design. we carried out device and process simulation with T-CAD tools. and then, we have extracted optimal device and process parameters for fabrication. we have analysis electrical characteristics after simulations. As results, we obtained 2,000 V breakdown voltage and 3.0 V Vce,sat. At the same time, we carried out field ring simulation for obtaining high voltage.

• Journal of Magnetics
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• 제12권1호
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• pp.12-16
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• 2007

Magnetic excitation and reversal by a spin polarized current via spin transfer have been a central research topic in spintronics due to its application potential. Special techniques are required to fabricate nano-scale magnetic layers in which the effect can be observed and studied. This work discusses the possibility of using electron-beam resists, the nano-scale patterning media, as ion milling mask in a subtractive fabrication method. The possibility is demonstrated by two resists, one positive tone, the ZEP 520A, and one negative tone, the ma-N2403. The advantage and the key points for success of this process will be also addressed.