• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.4
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• pp.1-9
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• 2002

The distribution characteristics of data retention time for DRAM was studied in connection with the probability distribution of the cell parameters. Using the cell parameters and the transient characteristics of cell node voltage, data retention time was investigated. The activation energy for dielectric layer growth on cell capacitance, the recombination trap energy for leakage current in the junction depletion region, and the sensitivity characteristics of sense amplifier were used as the random variables to perform the Monte Carlo simulation, and the probability distributions of cell parameters and distribution characteristics of cumulative failure bit on data retention time in DRAM cells were calculated. we found that the sensitivity characteristics of sense amplifier strongly affected on the tail bit distribution of data retention time.

• Proceedings of the IEEK Conference
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• 2004.08c
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• pp.460-462
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• 2004

The control of the data retention time is a main issue for realizing future high density dynamic random access memory. There are several leakage current mechanisms in which the stored data disappears. The mechanisms of data disappear is as follow, 1 )Junction leakage current between the junction, 2) Junction leakage current from the capacitor node contact, 3)Sub-threshold leakage current if the transfer transistor is affected by gate etch damage etc. In this paper we showed the plasma edge damage effect to find out data retention time effectiveness. First we measured the transistor characteristics of forward and reverse bias. And junction leakage characteristics are measured with/without plasma damage by HP4145. Finally, we showed the comparison TRET with etch damage, damage_cure_RTP and hydrogen_treatment. As a result, hydrogen_treatment is superior than any other method in a curing plasma etch damage side.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.9
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• pp.59-70
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• 1993

An efficient test method based on march test is presented to cover line leakage failures associated with bit and word lines or mega bit DRAM chips. A modified column march (Y-march) pattern is derived to improve fault coverage against the data retention failure. Time delay concept is introduced to develop a new column march test algorithm detecting various data retention failures. A built-in test circuit based on the column march pattern is designed and verified using logic simulation, confirming correct test operations.

• The Journal of the Korea institute of electronic communication sciences
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• v.7 no.4
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• pp.833-837
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• 2012

This paper proposes a DRAM data retention time enhancement method that minimizes silicon loss and undercut at STI sidewall by reducing the SC1 (Standard Cleaning) time. SC1 time optimization debilitates the parasitic electric field in STI's top corner, which reduces an inverse narrow width effect to result in reduction of channel doping density without increasing the subthreshold leakage of cell Tr. Moreover, it minimizes the electric field in depletion area from cell junction to P-well, increasing yield or data retention time.

• The korean journal of orthodontics
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• v.42 no.5
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• pp.255-262
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• 2012

Objective: We aimed to compare the retention characteristics of Essix and Hawley retainers. Methods: Adolescents undergoing fixed appliance treatment at 2 centers were recruited for this study. Twenty-two patients (16 women and 6 men) wore Essix retainers (Essix group) while 20 (14 women and 6 men) wore Hawley retainers (Hawley group). The mean retention time was 1 year, and the mean follow-up recall time for both groups was 2 years. Two qualified dental examiners evaluated the blind patient data. Maxillary and mandibular dental casts and lateral cephalograms were analyzed at 4 stages: pretreatment (T1), post-treatment (T2), post-retention (T3), and follow-up (T4). Results: The results revealed that Essix appliances were more efficient in retaining the anterior teeth in the mandible during a 1-year retention period. The irregularity index increased in both arches in both groups after a 2-year post-retention period. The mandibular arch lengths increased during treatment and tended to return to their original value after retention in both groups; however, these changes were statistically significant only in the Hawley group. Cephalometric variables did not show any significant differences. Conclusions: The retention characteristics of both Essix and Hawley retainers are similar.

• Journal of Digital Convergence
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• v.16 no.10
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• pp.261-270
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• 2018

The purpose of this study is to investigate the effect of work-family conflict and social support on retention intention in married female nurses. Participants were nurses working in 5 general hospitals in C city and data were collected from September 1 to 15, 2017. Data were analyzed by t-test, one-way ANOVA, Pearson's correlation, multiple regression analysis using SPSS Win 23.0. Factors influencing retention intention were identified as following; time-based conflict, more than one child, charge nurse, support of a co-workers, managers' support, with 37.3% explanatory power. This study shows that time-based conflict has negative effect on retention intention, while support of co-workers and managers have positive effect. This result may be useful in developing new strategies for enhancing retention intention. Further research is needed to identify other factors affecting the retention intention of married female nurses.

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.2
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• pp.69-75
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• 2003

Cell transistor and data retention time characteristics were studied in 90 nm design rule 512M-bit DRAM, for the first time. And, the characteristics of cell transistor are investigated for different STI gap-fill materials. HDP oxide with high compressive stress increases the threshold voltage of cell transistor, whereas the P-SOG oxide with small stress decreases the threshold voltage of cell transistor. Stress between silicon and gap-fill oxide material is found to be the major cause of the shift of the cell transistor threshold voltage. If high stress material is used for STI gap fill, channel-doping concentration can be reduced, so that cell junction leakage current is decreased and data retention time is increased.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.5
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• pp.1-8
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• 2000

Fatigue and data retention characteristics of the Pt/PZT/Pt structure using single grain PZT thin films by PZT seeding method were investigated. In case of fatigue, there is no loss in switched polarization up to 2$\times$10$^{11}$ cycles using 1MHz square wave form at $\pm$10V and no data loss after 30000sec of memory retention at room temperature. From the activation energy measured at high temperatures, the time required 20% loss in remanent polarization is estimated to be 6.6$\times$10$^{7}$ years at room temperature.

• Bulletin of the Korean Chemical Society
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• v.26 no.4
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• pp.629-633
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• 2005

In the reversed-phase chromatography, the retention time of sample was investigated based on the molecular structure of compound. Several descriptors that were related to retention factors were selected, and then the values of descriptors were calculated with several softwares. The effect of retention factor was measured with calculated values, and the results were obtained that each descriptors of molecular structure of compound have different effect on the retention factor. Therefore, the empirical equation for seven types of descriptors considered was obtained, and it has high values of correlation coefficient. Furthermore, the experimental data and calculated values have good agreement.

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.1
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• pp.1-14
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• 2001

Current status and prospects of FET-type FeRAMs (ferroelectric random access memories) are reviewed. First, it is described that the most important issue for realizing FET-type FeRAMs is to improve the data retention characteristics of ferroelectric-gate FETs. Then, necessary conditions to prolong the retention time are discussed from viewpoints of materials, device structure, and circuit configuration. Finally, recent experimental results related to the FET-type memories are introduced, which include optimization of a buffer layer that is inserted between the ferroelectric film and a Si substrate, development of a new ferroelectric film with a small remnant polarization value, proposal and fabrication of a 1T2C-type memory cell with good retention characteristics, and so on.