• Nuclear Engineering and Technology
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• v.56 no.4
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• pp.1532-1537
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• 2024

Time-of-flight (TOF) PET detectors with fast-rise-time scintillators and fast-single photon time resolution silicon photomultiplier (SiPM) have been developed to improve the coincidence timing resolution (CTR) to sub-100 ps. The CTR can be further improved with an optimal bandwidth and minimized electronic noise in the readout circuit and this helps reduce the distortion of the fast signals generated from the TOF-PET detector. The purpose of this study was to develop an ultra-high frequency and fully-differential (UF-FD) readout circuit that minimizes distortion in the fast signals produced using TOF-PET detectors, and suppresses the impact of the electronic noise generated from the detector and front-end readout circuits. The proposed UF-FD readout circuit is composed of two differential amplifiers (time) and a current feedback operational amplifier (energy). The ultra-high frequency differential (7 GHz) amplifiers can reduce the common ground noise in the fully-differential mode and minimize the distortion in the fast signal. The CTR and energy resolution were measured to evaluate the performance of the UF-FD readout circuit. These results were compared with those obtained from a high-frequency and single ended readout circuit. The experiment results indicated that the UF-FD readout circuit proposed in this study could substantially improve the best achievable CTR of TOF-PET detectors.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.1049-1052
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• 1998

A new simplified circuit model for the switching noise analysis of the complicated multi-layer IC package is developed. The current flowing mechanism on the ground and power planes of the package is simplified by using the dependent current soures and partial plane circuit model. The methodology is very cost-efficient as well as accurate. It is demonstrated that the nosie based on the simplified circuit model has an excellent agreement with that of the complicated full circuit model. However, the simplified model takes only 5 minutes for the switching noise simulation, while the full circuit model takes more than 4 hours.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.8 no.1
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• pp.94-99
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• 1997

There are several factors that have influence on the phase noise of an oscillator. But one of the major factors is the flicker noise of a transistor, since the phase noise of an oscillator is generated by mixing the carrier with the low frequency noise near the DC having the characteristic of 1/f. In this paper, we have presented a method on reducing the phase noise of an oscillator by using a low-frequency feedback circuit based on an active bias circuit, and have fabricated a DRO for a DBS receiver. Measurement results show that the phase noise is -92 dBc/Hz at the 10 KHz offset frequency, and from these results we have found out that the reduction method is very effective.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2010.05a
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• pp.666-667
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• 2010

• Proceedings of the KIPE Conference
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• 1998.07a
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• pp.185-188
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• 1998

The recent flurry of activities and interest in Switched Reluctance Motor(SRM) has focused attention on various issues associated with implementing the SRM in the mass commertial Market. One such issue is the noise generated by radial force. In this paper, we proposed the circuit to reduce the noise of SRM using LC Resonant characteristic. The usefulness of proposed circuit is verified by experimental result.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.4
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• pp.28-39
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• 2007

This paper presents a programmable RF DFT (Radio Frequency Design-for-Testability) circuit for low noise amplifiers. We have developed a new on-chip RF DFT circuit that measures RF parameters of low noise amplifier (LNA) using only DC measurements [1, 2]. This circuit is extremely useful for today's RFIC devices in a complete RF transceiver environment. The DFT circuit contains test amplifier with programmable capacitor banks and RF peak detectors. The test circuit utilizes output DC voltage measurements and these measured values are translated into the LNA specifications such as input impedance and gain using the mathematical equations. Our on-chip DFT circuit can be self programmed for 1.8GHz, 2.4GHz and 5.25GHz low noise amplifiers for GSM, Bluetooth and IEEE802.11g standards. The circuit is simple and inexpensive.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.7
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• pp.11-19
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• 1998

A signal line potential variation due to the delta-I noise was physically investigated in CMOS integrated circuits. An equivalent circuit for the noise analysis was presented. The signal line was modeled as segmented RC-lumped circuits with the ground noise. Then the equivalent circuit was mathematically analyzed. Therebvy a new signal line potential variation model due to the switching mosie was developed. Th emodel was verified with 0.35.mu.m CMOS deivce model parameters. The model has an excellent agreement with HSPICE simulation. Thus the proposed model can be dirctly employed in the industry to design the high-performance integrted circuit design as well as integrated circuit package design.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.5
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• pp.1089-1095
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• 2005

This paper presents a new low-cost Built-In Self-Test (BIST) circuit for 50Hz low noise amplifier (LNA). The BIST circuit is designed for system-on-chip (SoC) transceiver environment. The proposed BIST circuit measures the LNA specifications such as input impedance, voltage gaih, noise figure, and input return loss all in a single SoC environment.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2002.11a
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• pp.326.2-326
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• 2002

A PDP(Plasma Display Panel) module consists of a discharge panel, a SMPS for power supply, driving boards for panel control, and a logic board. Driving boards supply high voltage pulses to induce glow dischargein the PDP panel. The electrical pulses excite the circuit elements and subsequentlyacoustic noises. The main sources of the noise in the circuit are the transformer of SMPS and the power MOSFET of driving boards, and the heat sinks often amplify the noise level. (omitted)

• Journal of IKEEE
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• v.21 no.3
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• pp.248-251
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• 2017

In this paper, The proposed board is developed by EMI compliant Dash Camera with $360^{\circ}$ omni angle. The proposed board is designed by designing DM and CM input noise reduction circuit and applying active EMI filter coupling circuit. The DM and CM input noise reduction circuit design uses a differential op amp circuit to obtain the DM noise coupled to the input signal via the parasitic capacitance(CP). In order to simplify the circuit by applying the active EMI filter coupling circuit, a noise separator is installed to compensate the noise of the EMI source to compensate the CM and DM active filter simultaneously. In order to evaluate the performance of the board for the proposed EMI response, an authorized accreditation body has confirmed that the electromagnetic certification standard for each frequency band is satisfied.